From 0975f7e91106f152d7367a2155b4272e9e9f15c9 Mon Sep 17 00:00:00 2001
From: fahim
Date: Wed, 25 Mar 2015 11:19:10 +0530
Subject: Subject: Updated changes for multiple output in model generation file

Description: The changes in model generation was done by Athul
---
 src/model_generation.py | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/model_generation.py b/src/model_generation.py
index 44bb1ad..5e854a0 100755
--- a/src/model_generation.py
+++ b/src/model_generation.py
@@ -623,8 +623,9 @@ for item in input_port:
     #else:
     #    components.append(item.split(':')[0]+": in std_logic_vector("+str(int(item.split(':')[1])-int(1))+" downto 0);\n\t\t\t\t")
 
-for item in output_port:
-    components.append(item.split(':')[0]+": out std_logic_vector("+str(int(item.split(':')[1])-int(1))+" downto 0)\n\t\t\t\t")
+for item in output_port[:-1]:
+    components.append(item.split(':')[0]+": out std_logic_vector("+str(int(item.split(':')[1])-int(1))+" downto 0);\n\t\t\t\t")
+components.append(output_port[-1].split(':')[0]+": out std_logic_vector("+str(int(output_port[-1].split(':')[1])-int(1))+" downto 0)\n\t\t\t\t")
     #if item.split(":")[1] != '1':                                                                                                               
     #    components.append(item.split(':')[0]+": out std_logic_vector("+str(int(item.split(':')[1])-int(1))+" downto 0)\n\t\t\t\t")                
     #else:                                                                                                                                       
-- 
cgit