From f8d3dbc8c0f1c59a0546998cb9365e5c291dca07 Mon Sep 17 00:00:00 2001
From: fossee
Date: Tue, 3 Sep 2019 11:07:32 +0530
Subject: added examples and modified server

---
 Example/counter/counter.vhdl | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 Example/counter/counter.vhdl

(limited to 'Example/counter/counter.vhdl')

diff --git a/Example/counter/counter.vhdl b/Example/counter/counter.vhdl
new file mode 100644
index 0000000..6e16138
--- /dev/null
+++ b/Example/counter/counter.vhdl
@@ -0,0 +1,22 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity counter is
+port(C : in std_logic;
+     CLR : in std_logic;
+     Q : out std_logic_vector(3 downto 0));
+end counter;
+architecture bhv of counter is
+signal tmp: std_logic_vector(3 downto 0);
+begin
+process (C, CLR)
+begin
+if (CLR='1') then
+tmp <= "0000";
+elsif (C'event and C='1') then
+tmp <= std_logic_vector(to_unsigned(1+to_integer(unsigned(tmp)), tmp'length));
+end if;
+end process;
+Q <= tmp;
+end bhv;
\ No newline at end of file
-- 
cgit