From eb95026ab9007631eb8e2a1c54dcd38fabcb60ad Mon Sep 17 00:00:00 2001
From: saurabhb17
Date: Wed, 18 Dec 2019 15:13:23 +0530
Subject: Examples Restructered

---
 .../bin_to_gray/bin_to_gray.vhdl                    | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
 create mode 100644 Example/combinational_logic/bin_to_gray/bin_to_gray.vhdl

(limited to 'Example/combinational_logic/bin_to_gray')

diff --git a/Example/combinational_logic/bin_to_gray/bin_to_gray.vhdl b/Example/combinational_logic/bin_to_gray/bin_to_gray.vhdl
new file mode 100644
index 0000000..d6045e8
--- /dev/null
+++ b/Example/combinational_logic/bin_to_gray/bin_to_gray.vhdl
@@ -0,0 +1,21 @@
+LIBRARY ieee;
+USE ieee.std_logic_1164.ALL;
+
+entity bin_to_gray is
+port(   
+		bin : in std_logic_vector(3 downto 0); 
+        G   : out std_logic_vector(3 downto 0)
+    );
+end bin_to_gray;
+
+
+architecture gate_level of bin_to_gray is 
+
+begin
+
+G(3) <= bin(3);
+G(2) <= bin(3) xor bin(2);
+G(1) <= bin(2) xor bin(1);
+G(0) <= bin(1) xor bin(0);
+
+end gate_level;
\ No newline at end of file
-- 
cgit