1 files changed, 19 insertions, 11 deletions
diff --git a/Example/counter/counter.vhdl b/Example/counter/counter.vhdl
index 6e16138..ba14df8 100644
--- a/Example/counter/counter.vhdl
+++ b/Example/counter/counter.vhdl
@@ -1,4 +1,5 @@
 library ieee;
+
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;
 
@@ -7,16 +8,23 @@ port(C : in std_logic;
      CLR : in std_logic;
      Q : out std_logic_vector(3 downto 0));
 end counter;
+
 architecture bhv of counter is
-signal tmp: std_logic_vector(3 downto 0);
-begin
-process (C, CLR)
-begin
-if (CLR='1') then
-tmp <= "0000";
-elsif (C'event and C='1') then
-tmp <= std_logic_vector(to_unsigned(1+to_integer(unsigned(tmp)), tmp'length));
-end if;
-end process;
-Q <= tmp;
+
+	signal tmp: std_logic_vector(3 downto 0);
+	begin
+	process (C, CLR)
+
+		begin
+			if (CLR='1') then
+			tmp <= "0000";
+
+			elsif (C'event and C='1') then
+			tmp <= std_logic_vector(to_unsigned(1+to_integer(unsigned(tmp)), tmp'length));
+
+			end if;
+
+	end process;
+	Q <= tmp;
+
 end bhv;
 \ No newline at end of file