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Diffstat (limited to 'Example/combinational_logic/counter/counter.vhdl')
-rw-r--r-- | Example/combinational_logic/counter/counter.vhdl | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/Example/combinational_logic/counter/counter.vhdl b/Example/combinational_logic/counter/counter.vhdl new file mode 100644 index 0000000..ba14df8 --- /dev/null +++ b/Example/combinational_logic/counter/counter.vhdl @@ -0,0 +1,30 @@ +library ieee; + +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity counter is +port(C : in std_logic; + CLR : in std_logic; + Q : out std_logic_vector(3 downto 0)); +end counter; + +architecture bhv of counter is + + signal tmp: std_logic_vector(3 downto 0); + begin + process (C, CLR) + + begin + if (CLR='1') then + tmp <= "0000"; + + elsif (C'event and C='1') then + tmp <= std_logic_vector(to_unsigned(1+to_integer(unsigned(tmp)), tmp'length)); + + end if; + + end process; + Q <= tmp; + +end bhv;
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