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authorfossee2019-09-03 11:07:32 +0530
committerfossee2019-09-03 11:07:32 +0530
commitf8d3dbc8c0f1c59a0546998cb9365e5c291dca07 (patch)
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parent491e95ad13764229c3e27dfb625c5dbef9ddec59 (diff)
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added examples and modified server
Diffstat (limited to 'Example/nghdl_half_adder')
-rw-r--r--Example/nghdl_half_adder/nghdl_ha.vhdl22
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diff --git a/Example/nghdl_half_adder/nghdl_ha.vhdl b/Example/nghdl_half_adder/nghdl_ha.vhdl
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+++ b/Example/nghdl_half_adder/nghdl_ha.vhdl
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+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity nghdl_ha is
+port (
+ i_bit1 : in std_logic_vector(0 downto 0);
+ i_bit2 : in std_logic_vector(0 downto 0);
+ o_sum : out std_logic_vector(0 downto 0);
+ o_carry : out std_logic_vector(0 downto 0)
+ );
+end nghdl_ha;
+
+
+architecture rtl of nghdl_ha is
+
+begin
+
+ o_sum <= i_bit1 xor i_bit2;
+ o_carry <= i_bit1 and i_bit2;
+
+end rtl; \ No newline at end of file