Examples Restructered

1 files changed, 14 insertions, 0 deletions

diff --git a/Example/logic_gates/inverter.vhdl b/Example/logic_gates/inverter.vhdl
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+++ b/Example/logic_gates/inverter.vhdl
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+library ieee;
+use ieee.std_logic_1164.all;
+
+entity inverter is
+    port ( i: in std_logic;
+           o: out std_logic);
+end inverter;
+
+architecture beh of inverter is
+begin
+    o <= not i;
+end beh;
+
+