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author | saurabhb17 | 2019-12-18 15:13:23 +0530 |
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committer | saurabhb17 | 2019-12-18 15:13:23 +0530 |
commit | eb95026ab9007631eb8e2a1c54dcd38fabcb60ad (patch) | |
tree | 8695e410cfe16a3b2e37600cd64b3f0b9a5673e2 /Example/half_adder | |
parent | 04d9c666b4bb19936dfa469f536fb38107e631eb (diff) | |
download | nghdl-eb95026ab9007631eb8e2a1c54dcd38fabcb60ad.tar.gz nghdl-eb95026ab9007631eb8e2a1c54dcd38fabcb60ad.tar.bz2 nghdl-eb95026ab9007631eb8e2a1c54dcd38fabcb60ad.zip |
Examples Restructered
Diffstat (limited to 'Example/half_adder')
-rw-r--r-- | Example/half_adder/half_adder.vhdl | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/Example/half_adder/half_adder.vhdl b/Example/half_adder/half_adder.vhdl deleted file mode 100644 index 71ef1cc..0000000 --- a/Example/half_adder/half_adder.vhdl +++ /dev/null @@ -1,18 +0,0 @@ -library ieee; -use ieee.std_logic_1164.all; -use ieee.numeric_std.all; - -entity half_adder is - port ( - i_bit0 : in std_logic_vector(0 downto 0); - i_bit1 : in std_logic_vector(0 downto 0); - o_sum : out std_logic_vector(0 downto 0); - o_carry : out std_logic_vector(0 downto 0) - ); -end half_adder; - -architecture rtl of half_adder is -begin - o_sum <= i_bit0 xor i_bit1; - o_carry <= i_bit0 and i_bit1; -end rtl; |