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| author | saurabhb17 | 2019-12-30 12:37:57 +0530 |
|---|---|---|
| committer | GitHub | 2019-12-30 12:37:57 +0530 |
| commit | 9faa3ee18b0fe7ec50399b06280a5247658c3e9c (patch) | |
| tree | 0ff4c4791a65364e3b93c91f56342569c7f7a7c9 /Example/combinational_logic/bin_to_gray | |
| parent | 04d9c666b4bb19936dfa469f536fb38107e631eb (diff) | |
| parent | fc1fb5abffa152808c621be38c8fbbe8de769b19 (diff) | |
| download | nghdl-9faa3ee18b0fe7ec50399b06280a5247658c3e9c.tar.gz nghdl-9faa3ee18b0fe7ec50399b06280a5247658c3e9c.tar.bz2 nghdl-9faa3ee18b0fe7ec50399b06280a5247658c3e9c.zip | |
Merge pull request #35 from saurabhb17/master
Changes for 1.1.3 version release
Diffstat (limited to 'Example/combinational_logic/bin_to_gray')
| -rw-r--r-- | Example/combinational_logic/bin_to_gray/bin_to_gray.vhdl | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/Example/combinational_logic/bin_to_gray/bin_to_gray.vhdl b/Example/combinational_logic/bin_to_gray/bin_to_gray.vhdl new file mode 100644 index 0000000..d6045e8 --- /dev/null +++ b/Example/combinational_logic/bin_to_gray/bin_to_gray.vhdl @@ -0,0 +1,21 @@ +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; + +entity bin_to_gray is +port( + bin : in std_logic_vector(3 downto 0); + G : out std_logic_vector(3 downto 0) + ); +end bin_to_gray; + + +architecture gate_level of bin_to_gray is + +begin + +G(3) <= bin(3); +G(2) <= bin(3) xor bin(2); +G(1) <= bin(2) xor bin(1); +G(0) <= bin(1) xor bin(0); + +end gate_level;
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