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| author | rahul | 2019-10-22 11:27:47 +0530 |
|---|---|---|
| committer | rahul | 2019-10-22 11:27:47 +0530 |
| commit | 76241122c16990ee003df89391c85ee478ea0dca (patch) | |
| tree | 8055abb97cb298fa4dde4e11a3759ff2ea7358f0 /Example/2-bit-inverter/inverter.vhdl | |
| parent | 0b2a123b6ea6c3d09fae9fb054849432373794cf (diff) | |
| download | nghdl-76241122c16990ee003df89391c85ee478ea0dca.tar.gz nghdl-76241122c16990ee003df89391c85ee478ea0dca.tar.bz2 nghdl-76241122c16990ee003df89391c85ee478ea0dca.zip | |
Examples
Diffstat (limited to 'Example/2-bit-inverter/inverter.vhdl')
| -rw-r--r-- | Example/2-bit-inverter/inverter.vhdl | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/Example/2-bit-inverter/inverter.vhdl b/Example/2-bit-inverter/inverter.vhdl deleted file mode 100644 index 7eb3c67..0000000 --- a/Example/2-bit-inverter/inverter.vhdl +++ /dev/null @@ -1,14 +0,0 @@ -library ieee; -use ieee.std_logic_1164.all; - -entity inverter is - port ( i: in std_logic_vector(0 downto 0); - o: out std_logic_vector(0 downto 0)); -end inverter; - -architecture inverter_beh of inverter is -begin - o <= not i; -end inverter_beh; - - |