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authorfahim2015-03-25 11:19:10 +0530
committerfahim2015-03-25 11:19:10 +0530
commit0975f7e91106f152d7367a2155b4272e9e9f15c9 (patch)
tree6c6b7965abc79800b15a01dd17f92e4d52d5bc54
parent77b833bf6e7ea22bcc45177ac077e55556205580 (diff)
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Subject: Updated changes for multiple output in model generation file
Description: The changes in model generation was done by Athul
-rwxr-xr-xsrc/model_generation.py5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/model_generation.py b/src/model_generation.py
index 44bb1ad..5e854a0 100755
--- a/src/model_generation.py
+++ b/src/model_generation.py
@@ -623,8 +623,9 @@ for item in input_port:
#else:
# components.append(item.split(':')[0]+": in std_logic_vector("+str(int(item.split(':')[1])-int(1))+" downto 0);\n\t\t\t\t")
-for item in output_port:
- components.append(item.split(':')[0]+": out std_logic_vector("+str(int(item.split(':')[1])-int(1))+" downto 0)\n\t\t\t\t")
+for item in output_port[:-1]:
+ components.append(item.split(':')[0]+": out std_logic_vector("+str(int(item.split(':')[1])-int(1))+" downto 0);\n\t\t\t\t")
+components.append(output_port[-1].split(':')[0]+": out std_logic_vector("+str(int(output_port[-1].split(':')[1])-int(1))+" downto 0)\n\t\t\t\t")
#if item.split(":")[1] != '1':
# components.append(item.split(':')[0]+": out std_logic_vector("+str(int(item.split(':')[1])-int(1))+" downto 0)\n\t\t\t\t")
#else: