diff options
author | Rahul Paknikar | 2019-06-25 09:53:28 +0530 |
---|---|---|
committer | GitHub | 2019-06-25 09:53:28 +0530 |
commit | 42d57e78441f4b38ada6ff230cf6789a80faa4c0 (patch) | |
tree | f6c6d3e46631339f869e31c56cb55ab981934021 | |
parent | 9e80e87f39b65b91824e46c131fa98987a7e25f0 (diff) | |
download | nghdl-42d57e78441f4b38ada6ff230cf6789a80faa4c0.tar.gz nghdl-42d57e78441f4b38ada6ff230cf6789a80faa4c0.tar.bz2 nghdl-42d57e78441f4b38ada6ff230cf6789a80faa4c0.zip |
Update and rename t_demux.vhdl to demux.vhdl
-rw-r--r-- | Example/demux/demux.vhdl (renamed from Example/demux/t_demux.vhdl) | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/Example/demux/t_demux.vhdl b/Example/demux/demux.vhdl index 1e1f0bd..e73c196 100644 --- a/Example/demux/t_demux.vhdl +++ b/Example/demux/demux.vhdl @@ -1,7 +1,7 @@ library IEEE; use IEEE.STD_LOGIC_1164.all; -entity t_demux is +entity demux is port( F : in STD_LOGIC_vector(0 downto 0); @@ -12,9 +12,9 @@ entity t_demux is C: out STD_LOGIC_vector(0 downto 0); D: out STD_LOGIC_vector(0 downto 0) ); -end t_demux; +end demux; -architecture bhv of t_demux is +architecture bhv of demux is begin process (F,S0,S1) is begin @@ -29,4 +29,4 @@ begin end if; end process; -end bhv;
\ No newline at end of file +end bhv; |