v 20040111 1
C 8200 23400 1 0 0 vctcxo.sym
{
T 59600 53500 5 10 1 1 0 6 1
refdes=X1
T 59300 52600 5 10 0 1 0 0 1
footprint=CTS_OSC
}
C 57100 53600 1 0 0 generic-power.sym
{
T 57300 53850 5 10 1 1 0 3 1
net=DVDD:1
}
C 57200 51600 1 0 0 gnd-1.sym
C 57100 53300 1 270 0 capacitor-1.sym
{
T 56800 52500 5 10 1 1 0 0 1
refdes=C9
T 56800 52300 5 10 1 1 0 0 1
value=0.1uF
T 57100 53300 5 10 0 1 0 0 1
footprint=0603
}
N 57300 52400 57300 51900 4
N 57300 53300 57300 53600 4
N 57300 53500 57700 53500 4
N 57700 53500 57700 53000 4
N 57700 53000 57900 53000 4
N 57300 52100 57700 52100 4
N 57700 52100 57700 52600 4
N 57700 52600 57900 52600 4
C 56300 53300 1 270 0 capacitor-1.sym
{
T 56000 52500 5 10 1 1 0 0 1
refdes=C8
T 55900 52300 5 10 1 1 0 0 1
value=220pF
T 56300 53300 5 10 0 1 0 0 1
footprint=0603
}
N 56500 53500 56500 53300 4
N 56500 52400 56500 52100 4
C 60100 52800 1 270 0 generic-power.sym
{
T 60350 52600 5 10 1 1 270 3 1
net=DVDD:1
}
N 59900 52600 60100 52600 4
C 62500 52500 1 0 1 SMA-5.sym
{
T 62500 53300 5 10 1 1 0 6 1
refdes=J2
T 62500 52500 5 10 0 1 0 0 1
footprint=SMA_VERT
}
C 60700 52900 1 0 0 resistor-1.sym
{
T 60900 53200 5 10 1 1 180 8 1
refdes=R3
T 60700 52900 5 10 0 1 180 8 1
footprint=0603
T 61300 52700 5 10 1 1 0 6 1
value=50
}
N 62000 53000 61600 53000 4
C 62300 52000 1 0 0 gnd-1.sym
N 62400 52300 62400 52500 4
B 53700 46300 11000 8500 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 77900 52800 5 10 0 0 0 0 1
graphical=1
B 53900 46500 10600 8100 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 55700 46500 55700 46300 15 0 0 0 -1 -1
L 57700 46500 57700 46300 15 0 0 0 -1 -1
L 59700 46500 59700 46300 15 0 0 0 -1 -1
L 61700 46500 61700 46300 15 0 0 0 -1 -1
L 63700 46500 63700 46300 15 0 0 0 -1 -1
L 53900 48300 53700 48300 15 0 0 0 -1 -1
L 53900 50300 53700 50300 15 0 0 0 -1 -1
L 53900 52300 53700 52300 15 0 0 0 -1 -1
L 53900 54300 53700 54300 15 0 0 0 -1 -1
T 54700 46400 15 8 1 0 0 4 1
1
T 56700 46400 15 8 1 0 0 4 1
2
T 58700 46400 15 8 1 0 0 4 1
3
T 60700 46400 15 8 1 0 0 4 1
4
T 62700 46400 15 8 1 0 0 4 1
5
T 64200 46400 15 8 1 0 0 4 1
6
L 55700 54800 55700 54600 15 0 0 0 -1 -1
L 57700 54800 57700 54600 15 0 0 0 -1 -1
L 59700 54800 59700 54600 15 0 0 0 -1 -1
L 61700 54800 61700 54600 15 0 0 0 -1 -1
L 63700 54800 63700 54600 15 0 0 0 -1 -1
T 56700 54700 15 8 1 0 0 4 1
2
T 54700 54700 15 8 1 0 0 4 1
1
T 58700 54700 15 8 1 0 0 4 1
3
T 60700 54700 15 8 1 0 0 4 1
4
T 62700 54700 15 8 1 0 0 4 1
5
T 64200 54700 15 8 1 0 0 4 1
6
T 53800 47300 15 8 1 0 0 4 1
A
T 53800 49300 15 8 1 0 0 4 1
B
T 53800 51300 15 8 1 0 0 4 1
C
T 53800 53300 15 8 1 0 0 4 1
D
T 53800 54500 15 8 1 0 0 4 1
E
L 64700 48300 64500 48300 15 0 0 0 -1 -1
L 64700 50300 64500 50300 15 0 0 0 -1 -1
L 64700 52300 64500 52300 15 0 0 0 -1 -1
L 64700 54300 64500 54300 15 0 0 0 -1 -1
T 64600 54500 15 8 1 0 0 4 1
E
T 64600 53300 15 8 1 0 0 4 1
D
T 64600 51300 15 8 1 0 0 4 1
C
T 64600 49300 15 8 1 0 0 4 1
B
T 64600 47300 15 8 1 0 0 4 1
A
L 60400 47100 60400 46500 15 0 0 0 -1 -1
B 56900 46500 7600 1400 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 56900 47100 64500 47100 15 0 0 0 -1 -1
T 57500 46900 9 10 1 1 0 0 1
date=$Date: 2005/06/08 01:00:45 $
T 61400 46900 9 10 1 1 0 0 1
rev=$Revision: 1.1 $
T 62900 46600 9 10 1 1 0 0 1
auth=$Author: matt $
T 57700 47200 9 10 1 1 0 0 1
fname=$Source: /home/matt/usrp-hw-cvs/usrp-hw/clockfix/clockfix.sch,v $
T 60700 47600 9 14 1 1 0 4 1
title=USRP Clock Fix Board
T 57000 47200 15 8 1 0 0 0 1
FILE:
T 60500 46900 15 8 1 0 0 0 1
REVISION:
T 60500 46600 15 8 1 0 0 0 1
DRAWN BY: 
T 57000 46600 15 8 1 0 0 0 1
PAGE
T 58700 46600 15 8 1 0 0 0 1
OF
T 57000 47600 15 8 1 0 0 0 1
TITLE
T 57000 46900 15 8 1 0 0 0 1
DATE
T 57600 48300 8 10 0 0 0 0 1
graphical=1
T 57700 46600 9 10 1 0 0 0 1
1
T 59100 46600 9 10 1 0 0 0 1
1
N 59900 53000 60700 53000 4
C 57000 50700 1 0 0 inductor-1.sym
{
T 57700 51000 5 10 1 1 0 0 1
refdes=L1
T 57000 50700 5 10 0 1 0 0 1
footprint=1206
}
C 56200 50500 1 270 0 capacitor-1.sym
{
T 56100 49700 5 10 1 1 0 0 1
refdes=C1
T 55900 49500 5 10 1 1 0 0 1
value=0.1uF
T 56200 50500 5 10 0 1 0 0 1
footprint=0603
}
C 57100 50500 1 90 1 capacitor-1.sym
{
T 57300 50400 5 10 1 1 0 6 1
refdes=C2
T 57000 50200 5 10 1 1 0 0 1
value=220pF
T 57100 50500 5 10 0 1 0 6 1
footprint=0603
}
N 56900 49300 56900 49600 4
N 56900 50500 56900 50800 4
C 60000 50500 1 270 0 capacitor-2.sym
{
T 59700 49700 5 10 1 1 0 0 1
refdes=C6
T 59700 49500 5 10 1 1 0 0 1
value=4.7uF
T 60000 50500 5 10 0 1 0 0 1
footprint=1206
}
C 57900 48600 1 0 0 gnd-1.sym
N 56400 49300 56400 49600 4
C 11000 21100 1 0 0 adp3336.sym
{
T 62400 51200 5 10 1 1 0 6 1
refdes=U1
}
N 62700 49900 62900 49900 4
N 62900 49900 62900 50700 4
N 62900 50300 62700 50300 4
C 62900 50800 1 0 0 generic-power.sym
{
T 63100 51050 5 10 1 1 0 3 1
net=DVDD:1
}
N 62700 50700 63100 50700 4
C 54100 50000 1 0 0 connector2-1.sym
{
T 54100 50800 5 10 1 1 0 0 1
refdes=J1
T 54100 50000 5 10 0 1 0 0 1
footprint=CONNECTOR 1 2
}
N 55800 50500 55900 50500 4
N 55900 50500 55900 50800 4
N 56400 50500 56400 50800 4
N 55900 50800 57000 50800 4
C 57800 50500 1 270 0 capacitor-1.sym
{
T 57500 49700 5 10 1 1 0 0 1
refdes=C3
T 57500 49500 5 10 1 1 0 0 1
value=0.1uF
T 57800 50500 5 10 0 1 0 0 1
footprint=0603
}
C 58700 50500 1 90 1 capacitor-1.sym
{
T 58900 49700 5 10 1 1 0 6 1
refdes=C4
T 58900 49500 5 10 1 1 0 6 1
value=1uF
T 58700 50500 5 10 0 1 0 6 1
footprint=0603
}
N 58500 49300 58500 49600 4
N 58500 50500 58500 50800 4
N 58000 49300 58000 49600 4
N 58000 50500 58000 50800 4
C 58600 50700 1 0 0 inductor-1.sym
{
T 58800 51000 5 10 1 1 0 0 1
refdes=L2
T 58600 50700 5 10 0 1 0 0 1
footprint=1206
}
C 59400 50500 1 270 0 capacitor-1.sym
{
T 59100 49700 5 10 1 1 0 0 1
refdes=C5
T 59100 49500 5 10 1 1 0 0 1
value=0.1uF
T 59400 50500 5 10 0 1 0 0 1
footprint=0603
}
N 60200 49300 60200 49600 4
N 60200 50500 60200 50800 4
N 59600 49300 59600 49600 4
N 59600 50500 59600 50800 4
N 55900 49300 55900 50200 4
N 55900 50200 55800 50200 4
N 58000 48900 58000 49300 4
N 57900 50800 58600 50800 4
N 59500 50800 60500 50800 4
N 60500 50300 60700 50300 4
N 60500 50700 60700 50700 4
N 60500 49900 60700 49900 4
N 60500 49900 60500 50800 4
N 55900 49300 60500 49300 4
N 60500 49300 60500 49500 4
N 60500 49500 60700 49500 4
C 55600 53300 1 270 0 capacitor-2.sym
{
T 55300 52500 5 10 1 1 0 0 1
refdes=C7
T 55300 52300 5 10 1 1 0 0 1
value=4.7uF
T 55600 53300 5 10 0 1 0 0 1
footprint=1206
}
N 55800 52100 57300 52100 4
N 55800 52100 55800 52400 4
N 55800 53300 55800 53500 4
N 55800 53500 57300 53500 4
C 63000 50500 1 270 0 resistor-1.sym
{
T 63300 50100 5 10 1 1 180 8 1
refdes=R1
T 63000 50500 5 10 0 1 90 8 1
footprint=0603
T 63300 49900 5 10 1 1 0 0 1
value=140k
}
C 63000 49400 1 270 0 resistor-1.sym
{
T 63300 49000 5 10 1 1 180 8 1
refdes=R2
T 63000 49400 5 10 0 1 90 8 1
footprint=0603
T 63300 48800 5 10 1 1 0 0 1
value=78.7k
}
C 63000 48100 1 0 0 gnd-1.sym
N 63100 48400 63100 48500 4
N 62700 49500 63100 49500 4
N 63100 49400 63100 49600 4
N 63100 50500 63100 50800 4
C 64000 50600 1 90 1 capacitor-1.sym
{
T 63900 50300 5 10 1 1 0 0 1
refdes=C10
T 63900 49900 5 10 1 1 0 0 1
value=470pF
T 64000 50600 5 10 0 1 0 6 1
footprint=0603
}
N 63100 49500 63800 49500 4
N 63800 49500 63800 49700 4
N 63100 50700 63800 50700 4
N 63800 50700 63800 50600 4