From a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3 Mon Sep 17 00:00:00 2001
From: Johnathan Corgan
Date: Sun, 28 Feb 2010 12:47:43 -0800
Subject: Remove usrp1 and usrp2 FPGA files.  These are now hosted at:

git://ettus.sourcerepo.com/ettus/fpga.git

...under the 'usrp1' and 'usrp2' top-level directories.
---
 usrp2/fpga/sdr_lib/add2_and_round.v | 11 -----------
 1 file changed, 11 deletions(-)
 delete mode 100644 usrp2/fpga/sdr_lib/add2_and_round.v

(limited to 'usrp2/fpga/sdr_lib/add2_and_round.v')

diff --git a/usrp2/fpga/sdr_lib/add2_and_round.v b/usrp2/fpga/sdr_lib/add2_and_round.v
deleted file mode 100644
index 146af28da..000000000
--- a/usrp2/fpga/sdr_lib/add2_and_round.v
+++ /dev/null
@@ -1,11 +0,0 @@
-
-module add2_and_round
-  #(parameter WIDTH=16)
-    (input [WIDTH-1:0] in1,
-     input [WIDTH-1:0] in2,
-     output [WIDTH-1:0] sum);
-
-   wire [WIDTH:0] 	sum_int = {in1[WIDTH-1],in1} + {in2[WIDTH-1],in2};
-   assign 		sum = sum_int[WIDTH:1] + (sum_int[WIDTH] & sum_int[0]);
-   
-endmodule // add2_and_round
-- 
cgit