From a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3 Mon Sep 17 00:00:00 2001
From: Johnathan Corgan
Date: Sun, 28 Feb 2010 12:47:43 -0800
Subject: Remove usrp1 and usrp2 FPGA files.  These are now hosted at:

git://ettus.sourcerepo.com/ettus/fpga.git

...under the 'usrp1' and 'usrp2' top-level directories.
---
 usrp2/fpga/control_lib/clock_control_tb.sav | 28 ----------------------------
 1 file changed, 28 deletions(-)
 delete mode 100644 usrp2/fpga/control_lib/clock_control_tb.sav

(limited to 'usrp2/fpga/control_lib/clock_control_tb.sav')

diff --git a/usrp2/fpga/control_lib/clock_control_tb.sav b/usrp2/fpga/control_lib/clock_control_tb.sav
deleted file mode 100644
index be4001dc5..000000000
--- a/usrp2/fpga/control_lib/clock_control_tb.sav
+++ /dev/null
@@ -1,28 +0,0 @@
-[size] 1400 971
-[pos] -1 -1
-*-7.848898 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
-@28
-clock_control_tb.aux_clk
-clock_control_tb.reset
-clock_control_tb.sclk
-clock_control_tb.sdi
-clock_control_tb.sdo
-clock_control_tb.sen
-@22
-clock_control_tb.clock_control.counter[7:0]
-@28
-clock_control_tb.clock_control.done
-@22
-clock_control_tb.clock_control.entry[5:0]
-@28
-clock_control_tb.clock_control.read
-clock_control_tb.clock_control.reset
-clock_control_tb.clock_control.sclk
-clock_control_tb.clock_control.w[1:0]
-clock_control_tb.sen
-clock_control_tb.sdo
-clock_control_tb.sclk
-clock_control_tb.clock_control.done
-clock_control_tb.clock_control.start
-@22
-clock_control_tb.clock_control.addr_data[20:0]
-- 
cgit