From a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3 Mon Sep 17 00:00:00 2001
From: Johnathan Corgan
Date: Sun, 28 Feb 2010 12:47:43 -0800
Subject: Remove usrp1 and usrp2 FPGA files.  These are now hosted at:

git://ettus.sourcerepo.com/ettus/fpga.git

...under the 'usrp1' and 'usrp2' top-level directories.
---
 usrp/fpga/toplevel/sizetest/sizetest.quartus | 19 -------------------
 1 file changed, 19 deletions(-)
 delete mode 100644 usrp/fpga/toplevel/sizetest/sizetest.quartus

(limited to 'usrp/fpga/toplevel/sizetest/sizetest.quartus')

diff --git a/usrp/fpga/toplevel/sizetest/sizetest.quartus b/usrp/fpga/toplevel/sizetest/sizetest.quartus
deleted file mode 100644
index d1eaf227a..000000000
--- a/usrp/fpga/toplevel/sizetest/sizetest.quartus
+++ /dev/null
@@ -1,19 +0,0 @@
-COMPILER_SETTINGS_LIST
-{
-	COMPILER_SETTINGS = sizetest;
-}
-SIMULATOR_SETTINGS_LIST
-{
-	SIMULATOR_SETTINGS = sizetest;
-}
-SOFTWARE_SETTINGS_LIST
-{
-	SOFTWARE_SETTINGS = Debug;
-	SOFTWARE_SETTINGS = Release;
-}
-FILES
-{
-	VERILOG_FILE = ..\..\sdr_lib\cordic_stage.v;
-	VERILOG_FILE = ..\..\sdr_lib\cordic.v;
-	VERILOG_FILE = sizetest.v;
-}
-- 
cgit