From b5d45b36d47b198ff50289b5f292ff2e519dc7ad Mon Sep 17 00:00:00 2001
From: matt
Date: Tue, 2 Sep 2008 19:50:09 +0000
Subject: Allows for changing the interpolation rate dynamically.  Stop the
 pipeline, set the rate, restart the pipeline.  Fixes bug #248.

git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@9485 221aa14e-8319-0410-a670-987f0aec2ac5
---
 usrp/fpga/sdr_lib/cic_interp.v | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

(limited to 'usrp/fpga/sdr_lib')

diff --git a/usrp/fpga/sdr_lib/cic_interp.v b/usrp/fpga/sdr_lib/cic_interp.v
index 732f82ce0..32d106861 100755
--- a/usrp/fpga/sdr_lib/cic_interp.v
+++ b/usrp/fpga/sdr_lib/cic_interp.v
@@ -45,11 +45,12 @@ module cic_interp(clock,reset,enable,rate,strobe_in,strobe_out,signal_in,signal_
 
    sign_extend #(bw,bw+maxbitgain) 
       ext_input (.in(signal_in),.out(signal_in_ext));
-   
+
+   wire    clear_me = reset | ~enable;
    //FIXME Note that this section has pipe and diff reversed
    // It still works, but is confusing
    always @(posedge clock)
-     if(reset)
+     if(clear_me)
        for(i=0;i<N;i=i+1)
 	 integrator[i] <= #1 0;
      else if (enable & strobe_out)
@@ -61,7 +62,7 @@ module cic_interp(clock,reset,enable,rate,strobe_in,strobe_out,signal_in,signal_
        end
    
    always @(posedge clock)
-     if(reset)
+     if(clear_me)
        begin
 	  for(i=0;i<N;i=i+1)
 	    begin
-- 
cgit