From a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3 Mon Sep 17 00:00:00 2001
From: Johnathan Corgan
Date: Sun, 28 Feb 2010 12:47:43 -0800
Subject: Remove usrp1 and usrp2 FPGA files.  These are now hosted at:

git://ettus.sourcerepo.com/ettus/fpga.git

...under the 'usrp1' and 'usrp2' top-level directories.
---
 usrp/fpga/models/bustri.v | 17 -----------------
 1 file changed, 17 deletions(-)
 delete mode 100644 usrp/fpga/models/bustri.v

(limited to 'usrp/fpga/models/bustri.v')

diff --git a/usrp/fpga/models/bustri.v b/usrp/fpga/models/bustri.v
deleted file mode 100644
index 6e5a0f74c..000000000
--- a/usrp/fpga/models/bustri.v
+++ /dev/null
@@ -1,17 +0,0 @@
-
-// Model for tristate bus on altera
-// FIXME do we really need to use a megacell for this?
-
-module bustri (data,
-	       enabledt,
-	       tridata);
-   
-   input [15:0]  data;
-   input 	 enabledt;
-   inout [15:0]  tridata;
-   
-   assign 	 tridata = enabledt ? data :16'bz;
-   
-endmodule // bustri
-
-
-- 
cgit