From b644e266dd6f5f4b6cdac126477b61debee89e26 Mon Sep 17 00:00:00 2001
From: eb
Date: Wed, 5 Sep 2007 01:43:43 +0000
Subject: Merged features/inband-usb r5224:6306 into trunk. This is
 work-in-progress on inband signaling for the USRP1.

git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@6307 221aa14e-8319-0410-a670-987f0aec2ac5
---
 usrp/fpga/megacells/fifo_4kx16.cmp | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100755 usrp/fpga/megacells/fifo_4kx16.cmp

(limited to 'usrp/fpga/megacells/fifo_4kx16.cmp')

diff --git a/usrp/fpga/megacells/fifo_4kx16.cmp b/usrp/fpga/megacells/fifo_4kx16.cmp
new file mode 100755
index 000000000..7bc6941d7
--- /dev/null
+++ b/usrp/fpga/megacells/fifo_4kx16.cmp
@@ -0,0 +1,29 @@
+--Copyright (C) 1991-2006 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions 
+--and other software and tools, and its AMPP partner logic 
+--functions, and any output files any of the foregoing 
+--(including device programming or simulation files), and any 
+--associated documentation or information are expressly subject 
+--to the terms and conditions of the Altera Program License 
+--Subscription Agreement, Altera MegaCore Function License 
+--Agreement, or other applicable license agreement, including, 
+--without limitation, that your use is for the sole purpose of 
+--programming logic devices manufactured by Altera and sold by 
+--Altera or its authorized distributors.  Please refer to the 
+--applicable agreement for further details.
+
+
+component fifo_4kx16
+	PORT
+	(
+		aclr		: IN STD_LOGIC ;
+		clock		: IN STD_LOGIC ;
+		data		: IN STD_LOGIC_VECTOR (15 DOWNTO 0);
+		rdreq		: IN STD_LOGIC ;
+		wrreq		: IN STD_LOGIC ;
+		empty		: OUT STD_LOGIC ;
+		full		: OUT STD_LOGIC ;
+		q		: OUT STD_LOGIC_VECTOR (15 DOWNTO 0);
+		usedw		: OUT STD_LOGIC_VECTOR (11 DOWNTO 0)
+	);
+end component;
-- 
cgit