Age | Commit message (Collapse) | Author | |
---|---|---|---|
2009-09-10 | remove unused port | Matt Ettus | |
2009-09-10 | More xilinx fifos, more clean up of our fifos | Matt Ettus | |
2009-09-10 | might as well use a cascade fifo to help timing and give a little more capacity | Matt Ettus | |
2009-09-05 | fix a typo which caused tx glitches | Matt Ettus | |
2009-09-04 | Untested fixes for getting serdes onto the new fifo system. Compiles, at least | Matt Ettus | |
2009-09-04 | Implement Eth flow control using pause frames | Matt Ettus | |
Not fully tested, but it seems to work without frame errors, sequence number errors or ethernet overruns. Still of course will get tx underruns on a slow machine, and the transmitted signal has some issues though. | |||
2009-09-04 | parameterized fifo sizes, some reformatting | Matt Ettus | |
2009-09-04 | remove unused old style fifo | Matt Ettus | |
2009-09-04 | allow control of whether or not to honor flow control, adds some debug lines | Matt Ettus | |
2009-09-04 | debug the rx side | Matt Ettus | |
2009-09-04 | no longer used, replaced by newfifo version | Matt Ettus | |
2009-09-04 | Merge branch 'new_eth' of http://gnuradio.org/git/eb into new_eth | Matt Ettus | |
2009-09-04 | remove special last_line adjustment from ethernet port | Eric Blossom | |
2009-09-04 | Merge branch 'new_eth' of http://gnuradio.org/git/eb into new_eth | Matt Ettus | |
2009-09-04 | Firmware now inserts mac source address value in each frame. | Eric Blossom | |
The old mac used to do this automatically. | |||
2009-09-04 | properly set the address filter | Matt Ettus | |
2009-09-04 | Merge branch 'new_eth' of http://gnuradio.org/git/matt into new_eth | Eric Blossom | |
* 'new_eth' of http://gnuradio.org/git/matt: seems to build a decent fpga, but still some issues with a full connection. | |||
2009-09-04 | Merge branch 'master' into new_eth | Matt Ettus | |
2009-09-04 | stop sending short ethernet command packets. | Eric Blossom | |
2009-09-04 | Fix problem with commands timing out (specifically stop_rx_streaming) | Eric Blossom | |
After fixing the race, this change uses Tom's idea to stop enqueuing data when trying to stop, and adds a new flush_rx_samples method to drop any samples that may have already been accumulated. I ran Tom's test case 500 times with 0 failures ;-) | |||
2009-09-04 | Fix race condition that caused commands such as stop_rx_streaming to fail. | Eric Blossom | |
This fixes the bulk of the problem. Next step is to drop data packets while waiting for the reply. | |||
2009-09-04 | stop sending short ethernet command packets. | Eric Blossom | |
2009-09-04 | Fix problem with commands timing out (specifically stop_rx_streaming) | Eric Blossom | |
After fixing the race, this change uses Tom's idea to stop enqueuing data when trying to stop, and adds a new flush_rx_samples method to drop any samples that may have already been accumulated. I ran Tom's test case 500 times with 0 failures ;-) | |||
2009-09-04 | Fix race condition that caused commands such as stop_rx_streaming to fail. | Eric Blossom | |
This fixes the bulk of the problem. Next step is to drop data packets while waiting for the reply. | |||
2009-09-03 | seems to build a decent fpga, but still some issues with a full connection. | Matt Ettus | |
2009-09-03 | removed hard-coded link_is_up = true; | Eric Blossom | |
2009-09-03 | MAC transmit seems to work now. The root cause of the problem was ↵ | Matt Ettus | |
accidentally using the rx_clk in one stage of the fifos on the tx side. | |||
2009-09-03 | set device to xc3s2000. Shouldn't make any differences. | Matt Ettus | |
2009-09-03 | misc ignores | Matt Ettus | |
2009-09-03 | made a new block ram based fifo, 64 (65) elements long, all fifos now have ↵ | Matt Ettus | |
"enhanced level logic" for accurate fullness. Maybe this will help... | |||
2009-09-02 | bring the testbench files up to date | Matt Ettus | |
2009-09-02 | major cleanup of 2 clock fifos | Matt Ettus | |
2009-09-02 | cleaning up the new fifos | Matt Ettus | |
2009-09-02 | cascadefifo.v wasn't used, only the double cascade version. fifo_2clock.v ↵ | Matt Ettus | |
and fifo_2clock.v are empty | |||
2009-09-02 | never used, not needed | Matt Ettus | |
2009-09-02 | ignore .o files | Matt Ettus | |
2009-09-02 | debug pins, cleaned ignores | Matt Ettus | |
2009-09-02 | sort out active-low lines on locallink fifos, added debug pins | Matt Ettus | |
2009-09-02 | Removed these files completely, they were for the old style of fifos | Matt Ettus | |
2009-09-02 | Expand frequency ranges to match hardware capability. | Johnathan Corgan | |
* Corresponds to SVN r11620:11622 * Fixes ticket 405 Reported-by: Dimitris Symeonidis <azimout@gmail.com> Fixed-by: Matt Ettus <matt@ettus.com> | |||
2009-09-01 | fixed addressing of registers, and added write enables to those that were ↵ | Matt Ettus | |
missing. MDIO seems ok. | |||
2009-09-01 | tell s/w link is up. additional debugging output | Eric Blossom | |
2009-08-31 | Merged SVN matt/new_eth r10782:11633 into new_eth | Johnathan Corgan | |
* svn diff http://gnuradio.org/svn/branches/developers/matt/new_eth -r10782:11633 * Patch applied with no conflicts or fuzz. | |||
2009-08-14 | Added git ignore files auto created from svn:ignore properties. | git | |
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@11592 221aa14e-8319-0410-a670-987f0aec2ac5 | |||
2009-08-02 | Made libusrp2 min and max samples even number. | jcorgan | |
This forces an even number of samples in the min or max case, preserving the alignment of interleaved samples in the face of RX overruns or TX underruns. git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@11526 221aa14e-8319-0410-a670-987f0aec2ac5 | |||
2009-07-30 | Add custom FPGA build. | jcorgan | |
This is a custom build for USRP2 FPGA. It allows using a BasicRX or LFRX board and feed two independent, real signals. In addition, instead of the CIC/HB decimator, which optimizes frequency response, it uses an integrate and dump decimator, which optimizes for time-domain impulse response. These changes have been made in dsp_core_rx.v: * A second DDC has been added, sharing a frequency register with the existing DDC. * The output of the two DDCs are interleaved as I1 Q1 I2 Q2I ... into the receive FIFO. This limits the host configured decimation to 8 intead of 4. Use gr.deinterleave to recover the streams. * The ADCs are hardcoded: RX_A ==> DDC #1 I-input 0 ==> DDC #1 Q-input RX_B ==> DDC #2 I-input 0 ==> DDC #2 Q-input Thus, the input mux has been disabled. * The CIC/HB decimator has been replaced by an integrate and dump at the decimation rate. * To assist with meeting timing, the external RAM has been disabled. The basic application is to coherently sample two real IF streams and downconvert to baseband, while minimizing the impulse response duration of the resampling filters. git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@11519 221aa14e-8319-0410-a670-987f0aec2ac5 | |||
2009-06-23 | added include <cstdio> statements in several files to make it compatible ↵ | anastas | |
with g++ 4.4 git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@11267 221aa14e-8319-0410-a670-987f0aec2ac5 | |||
2009-06-22 | 1 is for hardware control of leds, 0 is for software | matt | |
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@11261 221aa14e-8319-0410-a670-987f0aec2ac5 | |||
2009-06-19 | test for clock locking | matt | |
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@11241 221aa14e-8319-0410-a670-987f0aec2ac5 | |||
2009-06-19 | test for clock lock | matt | |
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@11240 221aa14e-8319-0410-a670-987f0aec2ac5 |