| Age | Commit message (Collapse) | Author |
|---|
|
|
|
|
|
|
|
|
|
digital_freq_lock - simple implementation of FLL only
pam_sync - extension of pam_timing that does freq, phase, and timing sync
|
|
|
|
loop to adjust the fractional rate while the integer rate keeps the increments moving properly. Allows the max rate deviation to be independent of the integer rate. Scaling of the differential taps also allows alpha and beta to operate independent of the rate when fractional samples per symbol are used. Slightly more tolerant to large signal values, but they still should be close to +/-1.
|
|
This reverts commit a524c6f494cfb3b88d1e55d3f1a35d97ec566c4e.
|
|
|
|
|
|
|
|
|
|
|
|
beta at runtime from GRC block.
|
|
|
|
|
|
|
|
|
|
|
|
|
