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-rw-r--r--usrp2/fpga/simple_gemac/simple_gemac_tb.v33
-rw-r--r--usrp2/fpga/simple_gemac/simple_gemac_tx.v37
2 files changed, 32 insertions, 38 deletions
diff --git a/usrp2/fpga/simple_gemac/simple_gemac_tb.v b/usrp2/fpga/simple_gemac/simple_gemac_tb.v
index 6584a1a81..231a8b2ec 100644
--- a/usrp2/fpga/simple_gemac/simple_gemac_tb.v
+++ b/usrp2/fpga/simple_gemac/simple_gemac_tb.v
@@ -37,8 +37,7 @@ module simple_gemac_tb;
task SendFlowCtrl;
begin
- $display("Sending Flow Control");
- $display($time);
+ $display("Sending Flow Control, %d", $time);
@(posedge clk);
pause_req <= 1;
@(posedge clk);
@@ -51,16 +50,14 @@ module simple_gemac_tb;
input [7:0] data_start;
input [31:0] data_len;
begin
- $display("Sending Packet Len=%d", data_len);
- $display($time);
+ $display("Sending Packet Len=%d, %d", data_len, $time);
count <= 1;
tx_data <= data_start;
tx_error <= 0;
tx_valid <= 1;
while(~tx_ack)
@(posedge tx_clk);
-// $display("Packet Accepted");
-// $display($time);
+ $display("Packet Accepted, %d", $time);
while(count < data_len)
begin
tx_data <= tx_data + 1;
@@ -75,8 +72,7 @@ module simple_gemac_tb;
task SendPacketFromFile;
input [31:0] data_len;
begin
- $display("Sending Packet From File Len=%d",data_len);
- $display($time);
+ $display("Sending Packet From File Len=%d, %d",data_len,$time);
$readmemh( "test_packet.mem",pkt_rom );
count = 0;
tx_data = pkt_rom[count];
@@ -84,8 +80,7 @@ module simple_gemac_tb;
tx_valid = 1;
while(~tx_ack)
@(posedge tx_clk);
-// $display("Packet Accepted");
-// $display($time);
+ $display("Packet Accepted, %d",$time);
count = 1;
while(count < data_len)
begin
@@ -112,31 +107,31 @@ module simple_gemac_tb;
initial
begin
@(negedge reset);
- repeat (100)
+ repeat (10)
@(posedge clk);
SendFlowCtrl;
- repeat (200)
+ repeat (20)
@(posedge clk);
SendPacket(8'hAA,10);
- repeat (100)
+ repeat (10)
@(posedge clk);
SendPacketFromFile(60);
- repeat (100)
+ repeat (10)
@(posedge clk);
SendPacketFromFile(61);
- repeat (100)
+ repeat (10)
@(posedge clk);
SendPacketFromFile(62);
- repeat (100)
+ repeat (10)
@(posedge clk);
SendPacketFromFile(63);
- repeat (100)
+ repeat (1)
@(posedge clk);
SendPacketFromFile(64);
- repeat (100)
+ repeat (10)
@(posedge clk);
SendPacketFromFile(59);
- repeat (100)
+ repeat (1)
@(posedge clk);
SendPacketFromFile(58);
#10000 $finish;
diff --git a/usrp2/fpga/simple_gemac/simple_gemac_tx.v b/usrp2/fpga/simple_gemac/simple_gemac_tx.v
index d164d3fed..ffc8f6e99 100644
--- a/usrp2/fpga/simple_gemac/simple_gemac_tx.v
+++ b/usrp2/fpga/simple_gemac/simple_gemac_tx.v
@@ -201,30 +201,11 @@ module simple_gemac_tx
(tx_state==TX_PAD) |
(tx_state[6]);
- reg [7:0] crc_ctr;
- reg calc_crc_d1;
- always @(posedge tx_clk)
- calc_crc_d1 <= calc_crc;
-
- always @(posedge tx_clk)
- if(reset)
- crc_ctr <= 0;
- else if(calc_crc)
- crc_ctr <= crc_ctr+1;
- else if(calc_crc_d1)
- $display("CRC COUNT = %d",crc_ctr);
- else
- crc_ctr <= 0;
-
crc crc(.clk(tx_clk), .reset(reset), .clear(clear_crc),
.data(txd_pre), .calc(calc_crc), .crc_out(crc_out));
assign tx_ack = (tx_state == TX_FIRSTBYTE);
- reg tx_valid_d1;
- always @(posedge tx_clk)
- tx_valid_d1 <= tx_valid;
-
always @(posedge tx_clk)
begin
GMII_TX_EN <= tx_en_pre;
@@ -244,3 +225,21 @@ module simple_gemac_tx
end
endmodule // simple_gemac_tx
+
+// Testing code
+/*
+ reg [7:0] crc_ctr;
+ reg calc_crc_d1;
+ always @(posedge tx_clk)
+ calc_crc_d1 <= calc_crc;
+
+ always @(posedge tx_clk)
+ if(reset)
+ crc_ctr <= 0;
+ else if(calc_crc)
+ crc_ctr <= crc_ctr+1;
+ else if(calc_crc_d1)
+ $display("CRC COUNT = %d",crc_ctr);
+ else
+ crc_ctr <= 0;
+*/