1 files changed, 0 insertions, 14 deletions
diff --git a/usrp2/fpga/eth/bench/verilog/miim_model.v b/usrp2/fpga/eth/bench/verilog/miim_model.v
deleted file mode 100644
index 936d99a80..000000000
--- a/usrp2/fpga/eth/bench/verilog/miim_model.v
+++ /dev/null
@@ -1,14 +0,0 @@
-
-// Skeleton PHY interface simulator
-
-module miim_model(input mdc_i, 
-		  inout mdio, 
-		  input phy_resetn_i, 
-		  input phy_clk_i, 
-		  output phy_intn_o,
-		  output [2:0] speed_o);
-
-   assign 		       phy_intn_o = 1;    // No interrupts
-   assign 		       speed_o = 3'b100;  // 1G mode
-   
-endmodule // miim_model