diff options
Diffstat (limited to 'usrp2/firmware/lib')
| -rw-r--r-- | usrp2/firmware/lib/memory_map.h | 25 | ||||
| -rw-r--r-- | usrp2/firmware/lib/u2_init.c | 4 |
2 files changed, 28 insertions, 1 deletions
diff --git a/usrp2/firmware/lib/memory_map.h b/usrp2/firmware/lib/memory_map.h index fb6fc45d7..78a4330d2 100644 --- a/usrp2/firmware/lib/memory_map.h +++ b/usrp2/firmware/lib/memory_map.h @@ -471,6 +471,31 @@ typedef struct { */ volatile uint32_t rx_mux; // called adc_mux in dsp_core_rx.v + /*! + * \brief Streaming GPIO configuration + * + * This determines whether the LSBs of I and Q samples come from the DSP + * pipeline or from the io_rx GPIO pins. To stream GPIO, one must first + * set the GPIO data direction register to have io_rx[15] and/or io_rx[14] + * configured as inputs. The GPIO pins will be sampled at the time the + * remainder of the DSP sample is strobed into the RX sample FIFO. There + * will be a decimation-dependent fixed time offset between the GPIO + * sample stream and the associated RF samples. + * + * 3 2 1 + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-------+-------+-------+-------+-------+-------+-------+-------+ + * | MBZ |Q|I| + * +-------+-------+-------+-------+-------+-------+-------+-------+ + * + * I 0=LSB comes from DSP pipeline (default) + * 1=LSB comes from io_rx[15] + * + * Q 0=LSB comes from DSP pipeline (default) + * 1=LSB comes from io_rx[14] + */ + volatile uint32_t gpio_stream_enable; + } dsp_rx_regs_t; #define dsp_rx_regs ((dsp_rx_regs_t *) DSP_RX_BASE) diff --git a/usrp2/firmware/lib/u2_init.c b/usrp2/firmware/lib/u2_init.c index 948055694..713b2c321 100644 --- a/usrp2/firmware/lib/u2_init.c +++ b/usrp2/firmware/lib/u2_init.c @@ -51,13 +51,15 @@ get_hw_rev(void) bool u2_init(void) { - // Set GPIOs to inputs + // Set GPIOs to inputs, disable GPIO streaming hal_gpio_set_ddr(GPIO_TX_BANK, 0x0000, 0xffff); hal_gpio_set_ddr(GPIO_RX_BANK, 0x0000, 0xffff); hal_gpio_write(GPIO_TX_BANK, 0x0000, 0xffff); // init s/w output value to zero hal_gpio_write(GPIO_RX_BANK, 0x0000, 0xffff); + dsp_rx_regs->gpio_stream_enable = 0; // I, Q LSBs come from DSP + hal_io_init(); // init spi, so that we can switch over to the high-speed clock |