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Diffstat (limited to 'usrp/fpga/sdr_lib/hb/coeff_rom.v')
-rw-r--r--usrp/fpga/sdr_lib/hb/coeff_rom.v16
1 files changed, 8 insertions, 8 deletions
diff --git a/usrp/fpga/sdr_lib/hb/coeff_rom.v b/usrp/fpga/sdr_lib/hb/coeff_rom.v
index c287eaaad..7f8886b4e 100644
--- a/usrp/fpga/sdr_lib/hb/coeff_rom.v
+++ b/usrp/fpga/sdr_lib/hb/coeff_rom.v
@@ -4,14 +4,14 @@ module coeff_rom (input clock, input [2:0] addr, output reg [15:0] data);
always @(posedge clock)
case (addr)
- 3'd0 : data <= #1 -16'd16;
- 3'd1 : data <= #1 16'd74;
- 3'd2 : data <= #1 -16'd254;
- 3'd3 : data <= #1 16'd669;
- 3'd4 : data <= #1 -16'd1468;
- 3'd5 : data <= #1 16'd2950;
- 3'd6 : data <= #1 -16'd6158;
- 3'd7 : data <= #1 16'd20585;
+ 3'd0 : data <= #1 -16'd49;
+ 3'd1 : data <= #1 16'd165;
+ 3'd2 : data <= #1 -16'd412;
+ 3'd3 : data <= #1 16'd873;
+ 3'd4 : data <= #1 -16'd1681;
+ 3'd5 : data <= #1 16'd3135;
+ 3'd6 : data <= #1 -16'd6282;
+ 3'd7 : data <= #1 16'd20628;
endcase // case(addr)
endmodule // coeff_rom