3 files changed, 12 insertions, 0 deletions
diff --git a/gr-usrp2/src/usrp2.i b/gr-usrp2/src/usrp2.i
index 8d3e732ec..e85de2082 100644
--- a/gr-usrp2/src/usrp2.i
+++ b/gr-usrp2/src/usrp2.i
@@ -53,6 +53,7 @@ public:
   bool fpga_master_clock_freq(long *freq);
   bool sync_to_pps();
   std::vector<uint32_t> peek32(uint32_t addr, uint32_t words);
+  bool poke32(uint32_t addr, const std::vector<uint32_t> &data);
 };
 
 // ----------------------------------------------------------------
diff --git a/gr-usrp2/src/usrp2_base.cc b/gr-usrp2/src/usrp2_base.cc
index 1f795421c..9c0d1fa1e 100644
--- a/gr-usrp2/src/usrp2_base.cc
+++ b/gr-usrp2/src/usrp2_base.cc
@@ -74,6 +74,12 @@ usrp2_base::peek32(uint32_t addr, uint32_t words)
 }
 
 bool
+usrp2_base::poke32(uint32_t addr, const std::vector<uint32_t> &data)
+{
+  return d_u2->poke32(addr, data);
+}
+
+bool
 usrp2_base::start()
 {
   // Default implementation is NOP
diff --git a/gr-usrp2/src/usrp2_base.h b/gr-usrp2/src/usrp2_base.h
index ed2a28fe1..4b72a707b 100644
--- a/gr-usrp2/src/usrp2_base.h
+++ b/gr-usrp2/src/usrp2_base.h
@@ -69,6 +69,11 @@ public:
   std::vector<uint32_t> peek32(uint32_t addr, uint32_t words);
 
   /*!
+   * \brief Write memory to Wishbone bus as words
+   */
+  bool poke32(uint32_t addr, const std::vector<uint32_t> &data);
+
+  /*!
    * \brief Called by scheduler when starting flowgraph
    */
   virtual bool start();