diff options
| -rw-r--r-- | gr-uhd/grc/gen_uhd_usrp_blocks.py | 46 | ||||
| -rw-r--r-- | gr-uhd/include/gr_uhd_usrp_source.h | 2 | ||||
| -rw-r--r-- | gr-uhd/swig/__init__.py | 15 | ||||
| -rw-r--r-- | gr-uhd/swig/uhd_swig.i | 2 |
4 files changed, 39 insertions, 26 deletions
diff --git a/gr-uhd/grc/gen_uhd_usrp_blocks.py b/gr-uhd/grc/gen_uhd_usrp_blocks.py index 19e64d2fd..5a5b2d3ca 100644 --- a/gr-uhd/grc/gen_uhd_usrp_blocks.py +++ b/gr-uhd/grc/gen_uhd_usrp_blocks.py @@ -28,7 +28,7 @@ MAIN_TMPL = """\ <make>uhd.usrp_$(sourk)( device_addr=\$dev_addr, stream_args=uhd.stream_args( - cpu_format='\$type.type', + cpu_format='\$type', otw_format='\$otw.format', args='\$otw.args', channels=range(\$nchan), @@ -88,63 +88,67 @@ self.\$(id).set_bandwidth(\$bw$(n), $n) <key>type</key> <type>enum</type> <option> - <name>complex float32</name> - <key>complex</key> - <opt>type:fc32</opt> + <name>Complex float32</name> + <key>fc32</key> + <opt>type:complex</opt> <opt>vlen:1</opt> </option> <option> - <name>complex uint16</name> - <key>short</key> - <opt>type:sc16</opt> + <name>Complex int16</name> + <key>sc16</key> + <opt>type:short</opt> <opt>vlen:2</opt> </option> <option> - <name>real float32</name> - <key>float</key> - <opt>type:f32</opt> + <name>Real float32</name> + <key>f32</key> + <opt>type:float</opt> <opt>vlen:1</opt> </option> <option> - <name>real uint16</name> - <key>short</key> - <opt>type:s16</opt> + <name>Real uint16</name> + <key>s16</key> + <opt>type:short</opt> <opt>vlen:1</opt> </option> </param> <param> <name>Wire Format</name> - <key>otw_format</key> + <key>otw</key> <type>enum</type> <option> - <name>complex uint16</name> + <name>Complex int16</name> <key>sc16</key> <opt>format:sc16</opt> <opt>args:</opt> </option> <option> - <name>complex uint8</name> + <name>Complex int8</name> <key>sc8</key> <opt>format:sc8</opt> <opt>args:</opt> </option> <option> - <name>real uint16</name> + <name>Real int16</name> + <key>s16</key> <opt>format:s16</opt> <opt>args:</opt> </option> <option> - <name>real uint8</name> + <name>Real int8</name> + <key>s8</key> <opt>format:s8</opt> <opt>args:</opt> </option> <option> - <name>magnitude uint16</name> + <name>Magnitude int16</name> + <key>s16_mag</key> <opt>format:s16</opt> <opt>args:magnitude</opt> </option> <option> - <name>magnitude uint8</name> + <name>Magnitude int8</name> + <key>s8_mag</key> <opt>format:s8</opt> <opt>args:magnitude</opt> </option> @@ -263,7 +267,7 @@ self.\$(id).set_bandwidth(\$bw$(n), $n) <check>\$nchan >= \$num_mboards</check> <$sourk> <name>$direction</name> - <type>\$type</type> + <type>\$type.type</type> <vlen>\$type.vlen</vlen> <nports>\$nchan</nports> </$sourk> diff --git a/gr-uhd/include/gr_uhd_usrp_source.h b/gr-uhd/include/gr_uhd_usrp_source.h index b194ba4a3..c2b310e44 100644 --- a/gr-uhd/include/gr_uhd_usrp_source.h +++ b/gr-uhd/include/gr_uhd_usrp_source.h @@ -69,7 +69,7 @@ class uhd_usrp_source; GR_UHD_API boost::shared_ptr<uhd_usrp_source> uhd_make_usrp_source( const uhd::device_addr_t &device_addr, const uhd::io_type_t &io_type, - size_t num_channels = 1 + size_t num_channels ); /*! diff --git a/gr-uhd/swig/__init__.py b/gr-uhd/swig/__init__.py index 5c7642a81..a50ec82a5 100644 --- a/gr-uhd/swig/__init__.py +++ b/gr-uhd/swig/__init__.py @@ -58,10 +58,15 @@ def _prepare_uhd_swig(): setattr(uhd_swig, 'device_addr_t', device_addr_t) #make the streamer args take **kwargs on init - class streamer_args(uhd_swig.stream_args_t): + class stream_args_t(uhd_swig.stream_args_t): def __init__(self, *args, **kwargs): super(stream_args_t, self).__init__(*args) - for key, val in kwargs.iteritems(): setattr(self, key, val) + for key, val in kwargs.iteritems(): + #for some reason, i cant assign a list in the constructor + #but what i can do is append the elements individually + if key == 'channels': + for v in val: self.channels.append(v) + else: setattr(self, key, val) setattr(uhd_swig, 'stream_args_t', stream_args_t) #handle general things on all uhd_swig attributes @@ -94,13 +99,15 @@ def _prepare_uhd_swig(): for index, key, cast in ( (0, 'device_addr', device_addr), (1, 'io_type', io_type), - (1, 'stream_args', stream_args), ): try: if len(args) > index: args[index] = cast(args[index]) if kwargs.has_key(key): kwargs[key] = cast(kwargs[key]) except: pass - return old_constructor(*args, **kwargs) + #dont pass kwargs, it confuses swig, map into args list: + for key in ('device_addr', 'stream_args', 'io_type', 'num_channels'): + if kwargs.has_key(key): args.append(kwargs[key]) + return old_constructor(*args) return constructor_interceptor setattr(uhd_swig, attr, constructor_factory(getattr(uhd_swig, attr))) diff --git a/gr-uhd/swig/uhd_swig.i b/gr-uhd/swig/uhd_swig.i index 7e612907c..6ff9d9843 100644 --- a/gr-uhd/swig/uhd_swig.i +++ b/gr-uhd/swig/uhd_swig.i @@ -48,6 +48,8 @@ //////////////////////////////////////////////////////////////////////// %template(string_vector_t) std::vector<std::string>; +%template(size_vector_t) std::vector<size_t>; + %include <uhd/config.hpp> %include <uhd/utils/pimpl.hpp> |