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-rw-r--r--gr-usrp2/src/usrp2.i3
-rw-r--r--gr-usrp2/src/usrp2_base.cc12
-rw-r--r--gr-usrp2/src/usrp2_base.h12
-rw-r--r--usrp2/host/include/usrp2/Makefile.am1
-rw-r--r--usrp2/host/include/usrp2/mimo_config.h50
-rw-r--r--usrp2/host/include/usrp2/usrp2.h4
6 files changed, 79 insertions, 3 deletions
diff --git a/gr-usrp2/src/usrp2.i b/gr-usrp2/src/usrp2.i
index 3d6da0606..319740283 100644
--- a/gr-usrp2/src/usrp2.i
+++ b/gr-usrp2/src/usrp2.i
@@ -31,6 +31,7 @@
%}
%include <usrp2/tune_result.h>
+%include <usrp2/mimo_config.h>
%template(uint32_t_vector) std::vector<uint32_t>;
@@ -48,7 +49,9 @@ public:
std::string interface_name() const;
%rename(_real_fpga_master_clock_freq) fpga_master_clock_freq;
bool fpga_master_clock_freq(long *freq);
+ bool config_mimo(int flags);
bool sync_to_pps();
+ bool sync_every_pps(bool enable);
std::vector<uint32_t> peek32(uint32_t addr, uint32_t words);
bool poke32(uint32_t addr, const std::vector<uint32_t> &data);
};
diff --git a/gr-usrp2/src/usrp2_base.cc b/gr-usrp2/src/usrp2_base.cc
index 34492dc47..bb9959725 100644
--- a/gr-usrp2/src/usrp2_base.cc
+++ b/gr-usrp2/src/usrp2_base.cc
@@ -68,11 +68,23 @@ usrp2_base::fpga_master_clock_freq(long *freq) const
}
bool
+usrp2_base::config_mimo(int flags)
+{
+ return d_u2->config_mimo(flags);
+}
+
+bool
usrp2_base::sync_to_pps()
{
return d_u2->sync_to_pps();
}
+bool
+usrp2_base::sync_every_pps(bool enable)
+{
+ return d_u2->sync_every_pps(enable);
+}
+
std::vector<uint32_t>
usrp2_base::peek32(uint32_t addr, uint32_t words)
{
diff --git a/gr-usrp2/src/usrp2_base.h b/gr-usrp2/src/usrp2_base.h
index bfd1dce09..67a62ba10 100644
--- a/gr-usrp2/src/usrp2_base.h
+++ b/gr-usrp2/src/usrp2_base.h
@@ -1,6 +1,6 @@
/* -*- c++ -*- */
/*
- * Copyright 2008 Free Software Foundation, Inc.
+ * Copyright 2008,2009 Free Software Foundation, Inc.
*
* This file is part of GNU Radio
*
@@ -64,11 +64,21 @@ public:
bool fpga_master_clock_freq(long *freq) const;
/*!
+ * \brief MIMO configuration
+ */
+ bool config_mimo(int flags);
+
+ /*!
* \brief Set master time to 0 at next PPS rising edge
*/
bool sync_to_pps();
/*!
+ * Reset master time to 0 at every PPS edge
+ */
+ bool sync_every_pps(bool enable);
+
+ /*!
* \brief Read memory from Wishbone bus as words
*/
std::vector<uint32_t> peek32(uint32_t addr, uint32_t words);
diff --git a/usrp2/host/include/usrp2/Makefile.am b/usrp2/host/include/usrp2/Makefile.am
index 4c6dac899..08fdcde33 100644
--- a/usrp2/host/include/usrp2/Makefile.am
+++ b/usrp2/host/include/usrp2/Makefile.am
@@ -26,6 +26,7 @@ usrp2include_HEADERS = \
copy_handler.h \
data_handler.h \
metadata.h \
+ mimo_config.h \
rx_nop_handler.h \
rx_sample_handler.h \
strtod_si.h \
diff --git a/usrp2/host/include/usrp2/mimo_config.h b/usrp2/host/include/usrp2/mimo_config.h
new file mode 100644
index 000000000..a1e038f74
--- /dev/null
+++ b/usrp2/host/include/usrp2/mimo_config.h
@@ -0,0 +1,50 @@
+/* -*- c -*- */
+/*
+ * Copyright 2008,2009 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#ifndef INCLUDED_USRP2_MIMO_CONFIG_H
+#define INCLUDED_USRP2_MIMO_CONFIG_H
+
+// FIXME: This duplicates the firmware usrp2_mimo_config.h file
+
+namespace usrp2 {
+
+ static const int _MC_WE_LOCK = 0x0001;
+ static const int _MC_MIMO_CLK_INPUT = 0x0002; // else SMA input
+
+ /*
+ * Derived masks (use these):
+ *
+ * We get our input from 1 of three places:
+ * Our free running oscilator, our SMA connector, or from the MIMO connector
+ */
+ static const int MC_WE_DONT_LOCK = 0x0000;
+ static const int MC_WE_LOCK_TO_SMA = (_MC_WE_LOCK | 0);
+ static const int MC_WE_LOCK_TO_MIMO = (_MC_WE_LOCK | _MC_MIMO_CLK_INPUT);
+
+ /*
+ * Independent of the source of the clock, we may or may not drive our
+ * clock onto the mimo connector. Note that there are dedicated clock
+ * signals in each direction, so disaster doesn't occurs if we're
+ * unnecessarily providing clock.
+ */
+ static const int MC_PROVIDE_CLK_TO_MIMO = 0x0004;
+}
+
+#endif /* INCLUDED_USRP2_MIMO_CONFIG_H */
diff --git a/usrp2/host/include/usrp2/usrp2.h b/usrp2/host/include/usrp2/usrp2.h
index f4086440e..1c99a54cb 100644
--- a/usrp2/host/include/usrp2/usrp2.h
+++ b/usrp2/host/include/usrp2/usrp2.h
@@ -25,7 +25,7 @@
#include <complex>
#include <usrp2/rx_sample_handler.h>
#include <usrp2/tune_result.h>
-
+#include <usrp2/mimo_config.h>
/*
* N.B., The interfaces described here are still in flux.
@@ -67,7 +67,7 @@ namespace usrp2 {
// FIXME: get from firmware include
static const int GPIO_TX_BANK = 0;
static const int GPIO_RX_BANK = 1;
-
+
class usrp2 : boost::noncopyable
{
public: