diff options
| -rw-r--r-- | usrp2/firmware/apps/Makefile.am | 3 | ||||
| -rw-r--r-- | usrp2/firmware/include/usrp2_types.h | 6 | ||||
| -rw-r--r-- | usrp2/firmware/lib/Makefile.am | 38 | ||||
| -rw-r--r-- | usrp2/firmware/lib/db_bitshark_rx.c | 78 | ||||
| -rw-r--r-- | usrp2/firmware/lib/db_init.c | 2 | ||||
| -rw-r--r-- | usrp2/firmware/lib/db_init_bitshark_rx.c | 401 |
6 files changed, 67 insertions, 461 deletions
diff --git a/usrp2/firmware/apps/Makefile.am b/usrp2/firmware/apps/Makefile.am index 2cbadd1ff..1dc8b0a73 100644 --- a/usrp2/firmware/apps/Makefile.am +++ b/usrp2/firmware/apps/Makefile.am @@ -47,7 +47,6 @@ noinst_PROGRAMS = \ txrx \ txrx_wbx \ txrx_xcvr \ - txrx_bitshark_rx \ factory_test \ burnrev30 \ burnrev31 \ @@ -65,7 +64,6 @@ noinst_PROGRAMS = \ # tx_drop2_SOURCES = tx_drop2.c app_common.c txrx_SOURCES = txrx.c app_common_v2.c txrx_wbx_SOURCES = txrx.c app_common_v2.c -txrx_bitshark_rx_SOURCES = txrx.c app_common_v2.c txrx_xcvr_SOURCES = txrx.c app_common_v2.c factory_test_SOURCES = factory_test.c app_common_v2.c eth_serdes_SOURCES = eth_serdes.c app_passthru_v2.c @@ -77,7 +75,6 @@ txrx_wbx_LDADD = ../lib/libu2fw_wbx.a txrx_xcvr_LDADD = ../lib/libu2fw_xcvr.a -txrx_bitshark_rx_LDADD = ../lib/libu2fw_burx.a noinst_HEADERS = \ app_common_v2.h \ diff --git a/usrp2/firmware/include/usrp2_types.h b/usrp2/firmware/include/usrp2_types.h index dd2bcf1ed..32cb25c41 100644 --- a/usrp2/firmware/include/usrp2_types.h +++ b/usrp2/firmware/include/usrp2_types.h @@ -50,6 +50,12 @@ u2_fxpt_freq_round_to_int(u2_fxpt_freq_t fx) return (int)((fx+(1<<(U2_FPF_RP-1)))>>U2_FPF_RP); } +static inline unsigned int +u2_fxpt_freq_round_to_uint(u2_fxpt_freq_t fx) +{ + return (unsigned int)((fx+(1<<(U2_FPF_RP-1)))>>U2_FPF_RP); +} + static inline double u2_fxpt_freq_to_double(u2_fxpt_freq_t fx) { diff --git a/usrp2/firmware/lib/Makefile.am b/usrp2/firmware/lib/Makefile.am index 0069c93eb..84e0c9440 100644 --- a/usrp2/firmware/lib/Makefile.am +++ b/usrp2/firmware/lib/Makefile.am @@ -20,20 +20,18 @@ include $(top_srcdir)/Makefile.common noinst_LIBRARIES = \ libu2fw.a \ libu2fw_wbx.a \ - libu2fw_burx.a \ libu2fw_xcvr.a libu2fw_a_SOURCES = \ abort.c \ ad9510.c \ - adf4350.c \ - adf4350_regs.c \ ad9777.c \ bsm12.c \ buffer_pool.c \ clocks.c \ db_basic.c \ + db_bitshark_rx.c \ db_dbsrx.c \ db_rfx.c \ db_tvrx.c \ @@ -100,40 +98,6 @@ libu2fw_wbx_a_SOURCES = \ spi.c \ u2_init.c -libu2fw_burx_a_SOURCES = \ - abort.c \ - ad9510.c \ - ad9777.c \ - bsm12.c \ - buffer_pool.c \ - clocks.c \ - db_basic.c \ - db_bitshark_rx.c \ - db_init_bitshark_rx.c \ - dbsm.c \ - eeprom.c \ - ethernet.c \ - eth_mac.c \ - _exit.c \ - exit.c \ - hal_io.c \ - hal_uart.c \ - i2c.c \ - lsadc.c \ - lsdac.c \ - mdelay.c \ - memcpy_wa.c \ - memset_wa.c \ - nonstdio.c \ - pic.c \ - print_mac_addr.c \ - print_rmon_regs.c \ - print_fxpt.c \ - print_buffer.c \ - printf.c \ - sd.c \ - spi.c \ - u2_init.c libu2fw_xcvr_a_SOURCES = \ abort.c \ diff --git a/usrp2/firmware/lib/db_bitshark_rx.c b/usrp2/firmware/lib/db_bitshark_rx.c index 72cafa2e9..4c126de9b 100644 --- a/usrp2/firmware/lib/db_bitshark_rx.c +++ b/usrp2/firmware/lib/db_bitshark_rx.c @@ -154,30 +154,16 @@ bitshark_rx_init(struct db_base *dbb) /* hal_gpio_write( GPIO_RX_BANK, ENABLE_5|ENABLE_33, ENABLE_5|ENABLE_33 ); */ /* above isn't needed, since we don't have any GPIO from the FPGA */ - /* The next set of initialization commands sent to the bitshark board - require a brief delay after each command. This only seems to be - necessary when sending a sequence of commands one after the other. - This issue appears to be specific to the USRP2, since it isn't - necessary on the USRP1. The 5 mS delay is a bit of - an emperical compromise: too short (say, 1 mS), and every once - in a great while a command will still be magically dropped on its - way out...too long (say, 500 mS) and higher-level apps such as - usrp2_fft.py seem to choke because the init sequence is taking - too long. So 5 mS was tested repeatedly without, and deemed - reasonable. Not sure if this is an issue with the I2C master - code in the microblaze or some place else, and I hate magic - delays too, but this seems to be stable. */ - /* setup the clock scheme to accept the USRP2's 100 MHz ref clk */ set_clock_scheme(0,100000000); - mdelay(5); + /* initial setting of gain */ dbb->set_gain(dbb,U2_DOUBLE_TO_FXPT_GAIN(20.0)); - mdelay(5); + /* Set the freq now to get the one time 10ms delay out of the way. */ u2_fxpt_freq_t dc; dbb->set_freq(dbb, dbb->freq_min, &dc); - mdelay(5); + /* set up the RF bandwidth of the signal of interest...Note: there doesn't appear to be a standard way of setting this bandwidth in USRP2-land (compared to USRP1-land, where we have the @@ -185,7 +171,6 @@ bitshark_rx_init(struct db_base *dbb) for now, simply set the bandwidth once for the intended application. */ db->extra.set_bw(dbb, 25000); /* 25 MHz channel bw */ - mdelay(5); return true; } @@ -196,7 +181,7 @@ bitshark_rx_set_freq(struct db_base *dbb, u2_fxpt_freq_t freq, u2_fxpt_freq_t *d struct db_bitshark_rx_dummy *db = (struct db_bitshark_rx_dummy *) dbb; unsigned char args[NUM_BYTES_IN_I2C_CMD]; unsigned char val[4]; - uint32_t freq_in_khz = (uint32_t)(u2_fxpt_freq_to_double(freq)/1000.0); + uint32_t freq_in_khz = (uint32_t)(u2_fxpt_freq_round_to_uint(freq)/1000); if(!(freq>=db->base.freq_min && freq<=db->base.freq_max)) { @@ -212,7 +197,21 @@ bitshark_rx_set_freq(struct db_base *dbb, u2_fxpt_freq_t freq, u2_fxpt_freq_t *d args[8] = val[0]; i2c_write(I2C_ADDR, args, NUM_BYTES_IN_I2C_CMD); - *dc = freq; + /* Add a brief delay after each command. This only seems to be + necessary when sending a sequence of commands one after the other. + This issue appears to be specific to the USRP2, since it isn't + necessary on the USRP1. The 5 mS delay is a bit of + an emperical compromise: too short (say, 1 mS), and every once + in a great while a command will still be magically dropped on its + way out...too long (say, 500 mS) and higher-level apps such as + usrp2_fft.py seem to choke because the init sequence is taking + too long. So 5 mS was tested repeatedly without error, and deemed + reasonable. Not sure if this is an issue with the I2C master + code in the microblaze or some place else, and I hate magic + delays too, but this seems to be stable. */ + mdelay(5); + + *dc = freq; return true; } @@ -234,6 +233,19 @@ bitshark_rx_set_gain(struct db_base *dbb, u2_fxpt_gain_t gain) args[5] = final_gain; i2c_write(I2C_ADDR, args, NUM_BYTES_IN_I2C_CMD); + /* Add a brief delay after each command. This only seems to be + necessary when sending a sequence of commands one after the other. + This issue appears to be specific to the USRP2, since it isn't + necessary on the USRP1. The 5 mS delay is a bit of + an emperical compromise: too short (say, 1 mS), and every once + in a great while a command will still be magically dropped on its + way out...too long (say, 500 mS) and higher-level apps such as + usrp2_fft.py seem to choke because the init sequence is taking + too long. So 5 mS was tested repeatedly without error, and deemed + reasonable. Not sure if this is an issue with the I2C master + code in the microblaze or some place else, and I hate magic + delays too, but this seems to be stable. */ + mdelay(5); return true; } @@ -257,6 +269,19 @@ bitshark_rx_set_bw(struct db_base *dbb, uint16_t bw_in_khz) args[6] = val[0]; i2c_write(I2C_ADDR, args, NUM_BYTES_IN_I2C_CMD); + /* Add a brief delay after each command. This only seems to be + necessary when sending a sequence of commands one after the other. + This issue appears to be specific to the USRP2, since it isn't + necessary on the USRP1. The 5 mS delay is a bit of + an emperical compromise: too short (say, 1 mS), and every once + in a great while a command will still be magically dropped on its + way out...too long (say, 500 mS) and higher-level apps such as + usrp2_fft.py seem to choke because the init sequence is taking + too long. So 5 mS was tested repeatedly without error, and deemed + reasonable. Not sure if this is an issue with the I2C master + code in the microblaze or some place else, and I hate magic + delays too, but this seems to be stable. */ + mdelay(5); return true; } @@ -293,6 +318,19 @@ set_clock_scheme(uint8_t clock_scheme, uint32_t ref_clk_freq) args[8] = val[0]; i2c_write(I2C_ADDR, args, NUM_BYTES_IN_I2C_CMD); + /* Add a brief delay after each command. This only seems to be + necessary when sending a sequence of commands one after the other. + This issue appears to be specific to the USRP2, since it isn't + necessary on the USRP1. The 5 mS delay is a bit of + an emperical compromise: too short (say, 1 mS), and every once + in a great while a command will still be magically dropped on its + way out...too long (say, 500 mS) and higher-level apps such as + usrp2_fft.py seem to choke because the init sequence is taking + too long. So 5 mS was tested repeatedly without error, and deemed + reasonable. Not sure if this is an issue with the I2C master + code in the microblaze or some place else, and I hate magic + delays too, but this seems to be stable. */ + mdelay(5); return true; } diff --git a/usrp2/firmware/lib/db_init.c b/usrp2/firmware/lib/db_init.c index bc82946fc..d58badc9e 100644 --- a/usrp2/firmware/lib/db_init.c +++ b/usrp2/firmware/lib/db_init.c @@ -51,6 +51,7 @@ extern struct db_base db_tvrx1; extern struct db_base db_tvrx2; extern struct db_base db_tvrx3; extern struct db_base db_dbsrx; +extern struct db_base db_bitshark_rx; struct db_base *all_dboards[] = { &db_basic_tx, @@ -73,6 +74,7 @@ struct db_base *all_dboards[] = { #endif &db_tvrx3, &db_dbsrx, + &db_bitshark_rx, 0 }; diff --git a/usrp2/firmware/lib/db_init_bitshark_rx.c b/usrp2/firmware/lib/db_init_bitshark_rx.c deleted file mode 100644 index 5729e3724..000000000 --- a/usrp2/firmware/lib/db_init_bitshark_rx.c +++ /dev/null @@ -1,401 +0,0 @@ -/* -*- c++ -*- */ -/* - * Copyright 2008,2009 Free Software Foundation, Inc. - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - - -#include <memory_map.h> -#include <i2c.h> -#include <usrp2_i2c_addr.h> -#include <string.h> -#include <stdio.h> -#include <db.h> -#include <db_base.h> -#include <hal_io.h> -#include <nonstdio.h> - -struct db_base *rx_dboard; // the rx daughterboard that's installed -struct db_base *tx_dboard; // the tx daughterboard that's installed - -extern struct db_base db_basic_tx; -extern struct db_base db_basic_rx; -extern struct db_base db_lf_tx; -extern struct db_base db_lf_rx; -extern struct db_base db_bitshark_rx; - -struct db_base *all_dboards[] = { - &db_basic_tx, - &db_basic_rx, - &db_lf_tx, - &db_lf_rx, - &db_bitshark_rx, - 0 -}; - - -typedef enum { UDBE_OK, UDBE_NO_EEPROM, UDBE_INVALID_EEPROM } usrp_dbeeprom_status_t; - -static usrp_dbeeprom_status_t -read_raw_dboard_eeprom (unsigned char *buf, int i2c_addr) -{ - if (!eeprom_read (i2c_addr, 0, buf, DB_EEPROM_CLEN)) - return UDBE_NO_EEPROM; - - if (buf[DB_EEPROM_MAGIC] != DB_EEPROM_MAGIC_VALUE) - return UDBE_INVALID_EEPROM; - - int sum = 0; - unsigned int i; - for (i = 0; i < DB_EEPROM_CLEN; i++) - sum += buf[i]; - - if ((sum & 0xff) != 0) - return UDBE_INVALID_EEPROM; - - return UDBE_OK; -} - - -/* - * Return DBID, -1 <none> or -2 <invalid eeprom contents> - */ -int -read_dboard_eeprom(int i2c_addr) -{ - unsigned char buf[DB_EEPROM_CLEN]; - - usrp_dbeeprom_status_t s = read_raw_dboard_eeprom (buf, i2c_addr); - - //printf("\nread_raw_dboard_eeprom: %d\n", s); - - switch (s){ - case UDBE_OK: - return (buf[DB_EEPROM_ID_MSB] << 8) | buf[DB_EEPROM_ID_LSB]; - - case UDBE_NO_EEPROM: - default: - return -1; - - case UDBE_INVALID_EEPROM: - return -2; - } -} - - -static struct db_base * -lookup_dbid(int dbid) -{ - if (dbid < 0) - return 0; - - int i; - for (i = 0; all_dboards[i]; i++) - if (all_dboards[i]->dbid == dbid) - return all_dboards[i]; - - return 0; -} - -static struct db_base * -lookup_dboard(int i2c_addr, struct db_base *default_db, char *msg) -{ - struct db_base *db; - int dbid = read_dboard_eeprom(i2c_addr); - - // FIXME removing this printf has the system hang if there are two d'boards - // installed. (I think the problem is in i2c_read/write or the way - // I kludge the zero-byte write to set the read address in eeprom_read.) - printf("%s dbid: 0x%x\n", msg, dbid); - - if (dbid < 0){ // there was some kind of problem. Treat as Basic Tx - return default_db; - } - else if ((db = lookup_dbid(dbid)) == 0){ - printf("No daugherboard code for dbid = 0x%x\n", dbid); - return default_db; - } - return db; -} - -void -set_atr_regs(int bank, struct db_base *db) -{ - uint32_t val[4]; - int shift; - int mask; - int i; - - val[ATR_IDLE] = db->atr_rxval; - val[ATR_RX] = db->atr_rxval; - val[ATR_TX] = db->atr_txval; - val[ATR_FULL] = db->atr_txval; - - if (bank == GPIO_TX_BANK){ - mask = 0xffff0000; - shift = 16; - } - else { - mask = 0x0000ffff; - shift = 0; - } - - for (i = 0; i < 4; i++){ - int t = (atr_regs->v[i] & ~mask) | ((val[i] << shift) & mask); - //printf("atr_regs[%d] = 0x%x\n", i, t); - atr_regs->v[i] = t; - } -} - -static void -set_gpio_mode(int bank, struct db_base *db) -{ - int i; - - hal_gpio_set_ddr(bank, db->output_enables, 0xffff); - set_atr_regs(bank, db); - - for (i = 0; i < 16; i++){ - if (db->used_pins & (1 << i)){ - // set to either GPIO_SEL_SW or GPIO_SEL_ATR - hal_gpio_set_sel(bank, i, (db->atr_mask & (1 << i)) ? 'a' : 's'); - } - } -} - -static int __attribute__((unused)) -determine_tx_mux_value(struct db_base *db) -{ - if (db->i_and_q_swapped) - return 0x01; - else - return 0x10; -} - -static int -determine_rx_mux_value(struct db_base *db) -{ -#define ADC0 0x0 -#define ADC1 0x1 -#define ZERO 0x2 - - static int truth_table[8] = { - /* swap_iq, uses */ - /* 0, 0x0 */ (ZERO << 2) | ZERO, // N/A - /* 0, 0x1 */ (ZERO << 2) | ADC0, - /* 0, 0x2 */ (ZERO << 2) | ADC1, - /* 0, 0x3 */ (ADC1 << 2) | ADC0, - /* 1, 0x0 */ (ZERO << 2) | ZERO, // N/A - /* 1, 0x1 */ (ZERO << 2) | ADC0, - /* 1, 0x2 */ (ZERO << 2) | ADC1, - /* 1, 0x3 */ (ADC0 << 2) | ADC1, - }; - - int subdev0_uses; - int subdev1_uses; - int uses; - - if (db->is_quadrature) - subdev0_uses = 0x3; // uses A/D 0 and 1 - else - subdev0_uses = 0x1; // uses A/D 0 only - - // FIXME second subdev on Basic Rx, LF RX - // if subdev2 exists - // subdev1_uses = 0x2; - subdev1_uses = 0; - - uses = subdev0_uses; - - int swap_iq = db->i_and_q_swapped & 0x1; - int index = (swap_iq << 2) | uses; - - return truth_table[index]; -} - - -void -db_init(void) -{ - int m; - - tx_dboard = lookup_dboard(I2C_ADDR_TX_A, &db_basic_tx, "Tx"); - //printf("db_init: tx dbid = 0x%x\n", tx_dboard->dbid); - set_gpio_mode(GPIO_TX_BANK, tx_dboard); - tx_dboard->init(tx_dboard); - m = determine_tx_mux_value(tx_dboard); - dsp_tx_regs->tx_mux = m; - //printf("tx_mux = 0x%x\n", m); - tx_dboard->current_lo_offset = tx_dboard->default_lo_offset; - - rx_dboard = lookup_dboard(I2C_ADDR_RX_A, &db_basic_rx, "Rx"); - //printf("db_init: rx dbid = 0x%x\n", rx_dboard->dbid); - set_gpio_mode(GPIO_RX_BANK, rx_dboard); - rx_dboard->init(rx_dboard); - m = determine_rx_mux_value(rx_dboard); - dsp_rx_regs->rx_mux = m; - //printf("rx_mux = 0x%x\n", m); - rx_dboard->current_lo_offset = rx_dboard->default_lo_offset; -} - -/*! - * Calculate the frequency to use for setting the digital down converter. - * - * \param[in] target_freq desired RF frequency (Hz) - * \param[in] baseband_freq the RF frequency that corresponds to DC in the IF. - * - * \param[out] dxc_freq is the value for the ddc - * \param[out] inverted is true if we're operating in an inverted Nyquist zone. -*/ -void -calc_dxc_freq(u2_fxpt_freq_t target_freq, u2_fxpt_freq_t baseband_freq, - u2_fxpt_freq_t *dxc_freq, bool *inverted) -{ - u2_fxpt_freq_t fs = U2_DOUBLE_TO_FXPT_FREQ(100e6); // converter sample rate - u2_fxpt_freq_t delta = target_freq - baseband_freq; - -#if 0 - printf("calc_dxc_freq\n"); - printf(" fs = "); print_fxpt_freq(fs); newline(); - printf(" target = "); print_fxpt_freq(target_freq); newline(); - printf(" baseband = "); print_fxpt_freq(baseband_freq); newline(); - printf(" delta = "); print_fxpt_freq(delta); newline(); -#endif - - if (delta >= 0){ - while (delta > fs) - delta -= fs; - if (delta <= fs/2){ // non-inverted region - *dxc_freq = -delta; - *inverted = false; - } - else { // inverted region - *dxc_freq = delta - fs; - *inverted = true; - } - } - else { - while (delta < -fs) - delta += fs; - if (delta >= -fs/2){ // non-inverted region - *dxc_freq = -delta; - *inverted = false; - } - else { // inverted region - *dxc_freq = delta + fs; - *inverted = true; - } - } -} - -bool -db_set_lo_offset(struct db_base *db, u2_fxpt_freq_t offset) -{ - db->current_lo_offset = offset; - return true; -} - -bool -db_tune(struct db_base *db, u2_fxpt_freq_t target_freq, struct tune_result *result) -{ - memset(result, 0, sizeof(*result)); - bool inverted = false; - u2_fxpt_freq_t dxc_freq; - u2_fxpt_freq_t actual_dxc_freq; - - // Ask the d'board to tune as closely as it can to target_freq+lo_offset - bool ok = db->set_freq(db, target_freq+db->current_lo_offset, &result->baseband_freq); - - // Calculate the DDC setting that will downconvert the baseband from the - // daughterboard to our target frequency. - calc_dxc_freq(target_freq, result->baseband_freq, &dxc_freq, &inverted); - - // If the spectrum is inverted, and the daughterboard doesn't do - // quadrature downconversion, we can fix the inversion by flipping the - // sign of the dxc_freq... (This only happens using the basic_rx board) - - if (db->spectrum_inverted) - inverted = !inverted; - - if (inverted && !db->is_quadrature){ - dxc_freq = -dxc_freq; - inverted = !inverted; - } - - if (db->is_tx){ - dxc_freq = -dxc_freq; // down conversion versus up conversion - ok &= db_set_duc_freq(dxc_freq, &actual_dxc_freq); - } - else { - ok &= db_set_ddc_freq(dxc_freq, &actual_dxc_freq); - } - - result->dxc_freq = dxc_freq; - result->residual_freq = dxc_freq - actual_dxc_freq; - result->inverted = inverted; - return ok; -} - -static int32_t -compute_freq_control_word(u2_fxpt_freq_t target_freq, u2_fxpt_freq_t *actual_freq) -{ - // If we were using floating point, we'd calculate - // master = 100e6; - // v = (int) rint(target_freq / master_freq) * pow(2.0, 32.0); - - //printf("compute_freq_control_word\n"); - //printf(" target_freq = "); print_fxpt_freq(target_freq); newline(); - - int32_t master_freq = 100000000; // 100M - - int32_t v = ((target_freq << 12)) / master_freq; - //printf(" fcw = %d\n", v); - - *actual_freq = (v * (int64_t) master_freq) >> 12; - - //printf(" actual = "); print_fxpt_freq(*actual_freq); newline(); - - return v; -} - - -bool -db_set_ddc_freq(u2_fxpt_freq_t dxc_freq, u2_fxpt_freq_t *actual_dxc_freq) -{ - int32_t v = compute_freq_control_word(dxc_freq, actual_dxc_freq); - dsp_rx_regs->freq = v; - return true; -} - -bool -db_set_duc_freq(u2_fxpt_freq_t dxc_freq, u2_fxpt_freq_t *actual_dxc_freq) -{ - int32_t v = compute_freq_control_word(dxc_freq, actual_dxc_freq); - dsp_tx_regs->freq = v; - return true; -} - -bool -db_set_gain(struct db_base *db, u2_fxpt_gain_t gain) -{ - return db->set_gain(db, gain); -} - -bool -db_set_antenna(struct db_base *db, int ant) -{ - if (db->set_antenna == 0) return false; - return db->set_antenna(db, ant); -} |