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| author | Johnathan Corgan | 2010-02-28 12:47:43 -0800 |
|---|---|---|
| committer | Johnathan Corgan | 2010-02-28 12:47:43 -0800 |
| commit | a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3 (patch) | |
| tree | 77121ca27b951f9bd687dbba33f6a9383ac74d5a /usrp/fpga/models/pll.v | |
| parent | db29a2cfc18554ae0a3c55a4e13dc4cbfa86317f (diff) | |
| download | gnuradio-a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3.tar.gz gnuradio-a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3.tar.bz2 gnuradio-a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3.zip | |
Remove usrp1 and usrp2 FPGA files. These are now hosted at:
git://ettus.sourcerepo.com/ettus/fpga.git
...under the 'usrp1' and 'usrp2' top-level directories.
Diffstat (limited to 'usrp/fpga/models/pll.v')
| -rw-r--r-- | usrp/fpga/models/pll.v | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/usrp/fpga/models/pll.v b/usrp/fpga/models/pll.v deleted file mode 100644 index 1d0cc7966..000000000 --- a/usrp/fpga/models/pll.v +++ /dev/null @@ -1,33 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2003 Matt Ettus -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// - -// Very simple model for the PLL in the RX buffer - -module pll (inclk0,c0); - - input inclk0; - output c0; - - assign c0 = #9 inclk0; - -endmodule // pll - - |