-- Copyright (C) 2001-2002 The University of Cincinnati.  
-- All rights reserved. 

-- This file is part of VESTs (Vhdl tESTs).

-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
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-- You may modify, distribute, and use the software contained in this
-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
-- June 1991. A copy of this license agreement can be found in the file
-- "COPYING", distributed with this archive.

-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 

-- ---------------------------------------------------------------------
--
-- $Id: test124.ams,v 1.1 2002-03-27 22:11:19 paw Exp $
-- $Revision: 1.1 $
--
-- ---------------------------------------------------------------------

----------------------------------------------------------------------
-- SIERRA REGRESSION TESTING MODEL
-- Develooped at:
-- Distriburted Processing Laboratory
-- University of cincinnati
-- Cincinnati
----------------------------------------------------------------------
-- File          : test124.ams
-- Author(s)     : Geeta Balarkishnan(gbalakri@ececs.uc.edu)
-- Created       : May 2001
----------------------------------------------------------------------
-- Description :
----------------------------------------------------------------------
-- this test is to chk the support of ALIAS, NATURE in the PACKAGE
-- declaration the test also chks the corrct use of quantity and terminal
-- declarations. 
--------------------------------------------------------------------------
PACKAGE electricalSystem IS
    NATURE electrical IS real ACROSS real THROUGH ground reference;
    FUNCTION SIN(X : real) RETURN real;
END PACKAGE electricalSystem;

--entity declaration

use work.electricalsystem.all;
ENTITY Rckt IS
END Rckt;

--architecture declaration

ARCHITECTURE aRckt  OF Rckt IS

   terminal T1, T2 : electrical;

   quantity VR across IR through T1 to T2;
   quantity VR1 across IR1 through T2;
   quantity VS across T1;
   constant R : REAL := 10.00;

BEGIN

eqn1    : VR == IR * R;
e2:	  VR1 == IR1 * R;
eqn2    : VS == 5.0;

end arckt;