-- Copyright (C) 2001-2002 The University of Cincinnati.  
-- All rights reserved. 

-- This file is part of VESTs (Vhdl tESTs).

-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
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-- You may modify, distribute, and use the software contained in this
-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
-- June 1991. A copy of this license agreement can be found in the file
-- "COPYING", distributed with this archive.

-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 

-- ---------------------------------------------------------------------
--
-- $Id: test114.ams,v 1.1 2002-03-27 22:11:19 paw Exp $
-- $Revision: 1.1 $
--
-- ---------------------------------------------------------------------

----------------------------------------------------------------------
-- SIERRA REGRESSION TESTING MODEL
-- Develooped at:
-- Distriburted Processing Laboratory
-- University of cincinnati
-- Cincinnati
----------------------------------------------------------------------
-- File          : model.ams
-- Author(s)     : Geeta Balarkishnan(gbalakri@ececs.uc.edu)
-- Created       : May 2001
----------------------------------------------------------------------
-- Description :
----------------------------------------------------------------------
-- the test checks the correctness of the two currents associated 
-- as through between same terminals.for eg: consider 2 resistors in
-- parallel.. here vd is same and id and ic are the currents.
-- the test checks for the simpel diode implementation
-- wherein the charge is evaluated wrt a relative tolerance value
----------------------------------------------------------------

PACKAGE electricalSystem IS
    NATURE electrical IS real ACROSS real THROUGH ground reference;
    FUNCTION SIN(X : real) RETURN real;
    FUNCTION EXP(X : real) RETURN real;
    FUNCTION SQRT(X : real) RETURN real;
    FUNCTION POW(X,Y : real) RETURN real;
END PACKAGE electricalSystem;

use work.electricalSystem.all;
entity test is
  generic(a:real:=1.0e-10; b:real:=0.0);
end entity;

architecture atest of test is
  terminal t1:electrical;
  quantity vd across id, ic through t1;
  quantity charge: real;
  --quantity ic : real;
  constant rd: real:=1.0; 
begin
  e1:     id== ((vd-id*rd)/0.5);
  e2:     charge== b*id;
  e3:     ic==charge'dot;
end architecture;