From 6c3f709174e8e4d5411f851cedb7d84c38d3b04a Mon Sep 17 00:00:00 2001
From: Tristan Gingold
Date: Fri, 20 Dec 2013 04:48:54 +0100
Subject: Import vests testsuite

---
 .../ashenden/compliant/fundamental/vc_amp.vhd      | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 testsuite/vests/vhdl-ams/ashenden/compliant/fundamental/vc_amp.vhd

(limited to 'testsuite/vests/vhdl-ams/ashenden/compliant/fundamental/vc_amp.vhd')

diff --git a/testsuite/vests/vhdl-ams/ashenden/compliant/fundamental/vc_amp.vhd b/testsuite/vests/vhdl-ams/ashenden/compliant/fundamental/vc_amp.vhd
new file mode 100644
index 0000000..5347c28
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ashenden/compliant/fundamental/vc_amp.vhd
@@ -0,0 +1,32 @@
+
+-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- VESTs is free software; you can redistribute it and/or modify it
+-- under the terms of the GNU General Public License as published by the
+-- Free Software Foundation; either version 2 of the License, or (at
+-- your option) any later version. 
+
+-- VESTs is distributed in the hope that it will be useful, but WITHOUT
+-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+-- for more details. 
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+
+library ieee_proposed;  use ieee_proposed.electrical_systems.all;
+                       
+entity vc_amp is
+  port ( quantity g : in voltage;
+         terminal a, o : electrical );
+end entity vc_amp;
+
+architecture ideal of vc_amp is
+  quantity v_in across a;
+  quantity v_out across i_out through o;
+begin
+  v_out == v_in * g;
+end architecture ideal;
-- 
cgit