From cf2ab2cf781a5c689739d57097d6da7ea6e710a0 Mon Sep 17 00:00:00 2001
From: Tristan Gingold
Date: Sat, 14 Mar 2015 07:27:00 +0100
Subject: Add reproducer for ticket40.

---
 testsuite/gna/ticket40/generic_when_test2.vhdl | 37 ++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 testsuite/gna/ticket40/generic_when_test2.vhdl

(limited to 'testsuite/gna/ticket40/generic_when_test2.vhdl')

diff --git a/testsuite/gna/ticket40/generic_when_test2.vhdl b/testsuite/gna/ticket40/generic_when_test2.vhdl
new file mode 100644
index 0000000..2863bd6
--- /dev/null
+++ b/testsuite/gna/ticket40/generic_when_test2.vhdl
@@ -0,0 +1,37 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use std.textio.all;
+
+--use work.GENERIC_WHEN.all;
+
+entity TEST2 is
+begin
+end entity TEST2;
+
+architecture BEHAVIOUR of TEST2 is
+        component GENERIC_WHEN is
+                generic( FOO  :     std_logic_vector(1 downto 0) );
+                port(    IN1  : in  std_logic_vector(1 downto 0);
+                         OUT1 : out std_logic_vector(1 downto 0) );
+        end component GENERIC_WHEN;
+
+        signal S1 : std_logic_vector(1 downto 0);
+        signal S2 : std_logic_vector(1 downto 0);
+begin
+
+        GENERIC_WHEN_INST : GENERIC_WHEN
+                generic map ( FOO  => "0" & "0")
+                port map (    IN1  => S1,
+                              OUT1 => S2 );
+        process
+                variable l : line;
+        begin
+                S1 <= "01";
+                writeline(output, l);
+                wait;
+        end process;
+
+end architecture BEHAVIOUR;
+
-- 
cgit