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path: root/src/vhdl/translate/trans-chap9.adb
AgeCommit message (Collapse)Author
2015-12-18Pass signal values to interfaces. 'sigptr' optimization.Tristan Gingold
Improve simulation speed by about 20%.
2015-09-04Suppress stack switching; save process state in secondary stack.Tristan Gingold
2015-09-02Translate: explicitly clean transient types.Tristan Gingold
2015-08-29Allow allocators in default value of subprogramsTristan Gingold
(Handle them in are_trees_equal).
2015-08-29Replace fat accesses by bounds accessesTristan Gingold
translate: separate info for signals from object. Improve some error messages.
2015-06-05Rework procedure calls, now use a record to pass parameters.Tristan Gingold
2015-03-31Fix entity instantiation with extended identifier.Tristan Gingold
From a patch by Ole Myren Rohne.
2015-01-16Keep and handle simple name for Block_Specification.Tristan Gingold
2015-01-11Fix ticket #29: add instance label in created symbols name.Tristan Gingold
2015-01-07Handle vhdl08 if generate statementsTristan Gingold
2015-01-04Rework for vhdl08 generate: change rtis.Tristan Gingold
2015-01-03Initial rework for vhdl 2008 generate statements.Tristan Gingold
2014-11-20trans-chap9: fix invalid generation of ortho code.Tristan Gingold
2014-11-09Split translation into child packages.Tristan Gingold