diff options
Diffstat (limited to 'testsuite/gna')
27 files changed, 710 insertions, 0 deletions
diff --git a/testsuite/gna/bug15368/15368.vhd b/testsuite/gna/bug15368/15368.vhd new file mode 100644 index 0000000..0c8a508 --- /dev/null +++ b/testsuite/gna/bug15368/15368.vhd @@ -0,0 +1,35 @@ +entity bug is +end entity; + +architecture a of bug is + component cmp is + port(o :out bit_vector); + end component; + +signal o:bit_vector(4 downto 0); + +begin + i_exp: cmp port map(o); + + process(o) + begin + report "o event" severity note; + end process; + +end architecture; + +entity cmp is + port(o :out bit_vector); +end entity; + +architecture a of cmp is + signal big_o:bit_vector(255 downto 0); + signal a:bit_vector(4 downto 0); +begin + + o <= big_o(a'range); + + big_o <= (others => '1') after 5 ns, (others => '0') after 10 ns; + a <= (others => '1') after 20 ns, (others => '0') after 30 ns; + +end architecture; diff --git a/testsuite/gna/bug15368/testsuite.sh b/testsuite/gna/bug15368/testsuite.sh new file mode 100755 index 0000000..9de7543 --- /dev/null +++ b/testsuite/gna/bug15368/testsuite.sh @@ -0,0 +1,10 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze 15368.vhd +elab_simulate bug + +clean + +echo "Test successful" diff --git a/testsuite/gna/bug18351/18351.vhd b/testsuite/gna/bug18351/18351.vhd new file mode 100644 index 0000000..2797ce2 --- /dev/null +++ b/testsuite/gna/bug18351/18351.vhd @@ -0,0 +1,57 @@ +entity PROBLEM is +end PROBLEM; + +architecture BUG of PROBLEM is + + -- original testcase used std_logic_vector but other types suffer too + type t_int_ptr is access integer; + + function ISSUE_HERE return t_int_ptr is + begin + return new integer; + end ISSUE_HERE; + + -- do functions with parameters work? + function ISSUE_2(I : Integer) return t_int_ptr is + variable Temp : t_int_ptr; + begin + Temp := new integer; + Temp.all := I; + return Temp; + end ISSUE_2; + + function ISSUE_3 return t_int_ptr is + variable Temp : t_int_ptr; + begin + Temp := new integer; + Temp.all := 33; + return Temp; + end ISSUE_3; + + -- original testcase passed the result as param to a procedure + -- so test passing parameters too + procedure ANY_STUFF(param: in integer) is + begin + report "Integer value " & integer'image(param) severity note; + end procedure; + +begin + + eval : process is + variable X : t_int_ptr; + variable Y : integer; + begin + X := ISSUE_HERE; + ANY_STUFF(X.all); -- Test case (1) : works + --Y := ISSUE_2(55).all; -- Test case (2) : used to fail; works with first patch + --ANY_STUFF(Y); + Y := ISSUE_HERE.all; -- Test case (3) : fails + ANY_STUFF(Y); + ANY_STUFF(ISSUE_HERE.all); -- Test case (4) : fails + Y := ISSUE_3.all; -- Test case (5) : fails + ANY_STUFF(Y); + ANY_STUFF(ISSUE_3.all); -- Test case (6) : fails + wait; + end process; + +end BUG; diff --git a/testsuite/gna/bug18351/PROBLEM.vhdl b/testsuite/gna/bug18351/PROBLEM.vhdl new file mode 100644 index 0000000..d312f2c --- /dev/null +++ b/testsuite/gna/bug18351/PROBLEM.vhdl @@ -0,0 +1,25 @@ +library ieee; +use ieee.std_logic_1164.all; + + +entity PROBLEM is +end PROBLEM; + + +architecture BUG of PROBLEM is + type t_stdlogic_ptr is access std_logic_vector; + function ISSUE_HERE return t_stdlogic_ptr; + + procedure PROBLEM_INSIDE is + procedure ANY_STUFF(param: in std_logic_vector) is + begin + end procedure; + begin + ANY_STUFF(ISSUE_HERE.all); + end PROBLEM_INSIDE; + +begin + + + +end BUG; diff --git a/testsuite/gna/bug18351/testsuite.sh b/testsuite/gna/bug18351/testsuite.sh new file mode 100755 index 0000000..e4a06ac --- /dev/null +++ b/testsuite/gna/bug18351/testsuite.sh @@ -0,0 +1,10 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze 18351.vhd +elab_simulate problem + +clean + +echo "Test successful" diff --git a/testsuite/gna/bug18353/TESTCASE.vhdl b/testsuite/gna/bug18353/TESTCASE.vhdl new file mode 100644 index 0000000..d4a333e --- /dev/null +++ b/testsuite/gna/bug18353/TESTCASE.vhdl @@ -0,0 +1,22 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + + +entity TESTCASE is +end TESTCASE; + + +architecture DUMMY of TESTCASE is +begin + + dummy: process + constant str : string := "8#5382#"; + variable xv : integer; + begin + xv := integer'value(str); + report "xv := " & integer'image(xv) severity NOTE; + wait; + end process; + +end DUMMY; diff --git a/testsuite/gna/bug18353/testsuite.sh b/testsuite/gna/bug18353/testsuite.sh new file mode 100755 index 0000000..a1d7c31 --- /dev/null +++ b/testsuite/gna/bug18353/testsuite.sh @@ -0,0 +1,10 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze TESTCASE.vhdl +elab_simulate_failure testcase + +clean + +echo "Test successful" diff --git a/testsuite/gna/bug18360/testcase.vhdl b/testsuite/gna/bug18360/testcase.vhdl new file mode 100644 index 0000000..2aabbed --- /dev/null +++ b/testsuite/gna/bug18360/testcase.vhdl @@ -0,0 +1,8 @@ +entity TESTCASE is +end entity TESTCASE; + +architecture PROBLEM of TESTCASE is + type ENUMERATION_TYPE is (VALUE1, VALUE2); + constant SOME_VAR : integer := ENUMERATION_TYPE'length; +begin +end architecture PROBLEM; diff --git a/testsuite/gna/bug18360/testsuite.sh b/testsuite/gna/bug18360/testsuite.sh new file mode 100755 index 0000000..e70deec --- /dev/null +++ b/testsuite/gna/bug18360/testsuite.sh @@ -0,0 +1,9 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze_failure testcase.vhdl + +clean + +echo "Test successful" diff --git a/testsuite/gna/bug19195/pkg.vhd b/testsuite/gna/bug19195/pkg.vhd new file mode 100644 index 0000000..4418e90 --- /dev/null +++ b/testsuite/gna/bug19195/pkg.vhd @@ -0,0 +1,13 @@ +library IEEE; +use IEEE.std_logic_1164.all; +package test_pkg is + type a is record + b : std_logic_vector(3 downto 0); + end record a; + type b is record + a1 : a; + end record b; + + signal c : b; + alias c0 : a is c.a1; +end package test_pkg; diff --git a/testsuite/gna/bug19195/testsuite.sh b/testsuite/gna/bug19195/testsuite.sh new file mode 100755 index 0000000..b5b0b3c --- /dev/null +++ b/testsuite/gna/bug19195/testsuite.sh @@ -0,0 +1,11 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze pkg.vhd +analyze top.vhdl +elab_simulate top + +clean + +echo "Test successful" diff --git a/testsuite/gna/bug19195/top.vhdl b/testsuite/gna/bug19195/top.vhdl new file mode 100644 index 0000000..fb1f4c7 --- /dev/null +++ b/testsuite/gna/bug19195/top.vhdl @@ -0,0 +1,7 @@ +entity top is +end top; + +use work.test_pkg; +architecture behav of top is +begin +end behav; diff --git a/testsuite/gna/bug20255/test.vhd b/testsuite/gna/bug20255/test.vhd new file mode 100644 index 0000000..52b72ff --- /dev/null +++ b/testsuite/gna/bug20255/test.vhd @@ -0,0 +1,16 @@ +entity e is +end entity e; +architecture test of e is +begin + test : process is + + type frequency is range -2147483647 to 2147483647 units KHz; + MHz = 1000 KHz; + GHz = 1000 MHz; + end units; + begin + assert frequency'image(2 MHz) = "2000 khz"; -- this should work, but GHDL produces an error + wait; + end process; + +end architecture test; diff --git a/testsuite/gna/bug20255/test_20255.vhd b/testsuite/gna/bug20255/test_20255.vhd new file mode 100644 index 0000000..d647f46 --- /dev/null +++ b/testsuite/gna/bug20255/test_20255.vhd @@ -0,0 +1,32 @@ +entity e is +end entity e; +architecture test of e is +signal s : string(1 to 9) := "2.345 Mhz"; +signal s2 : string(1 to 9) := "2345 khz "; + + type frequency is range -2147483647 to 2147483647 units KHz; + MHz = 1000 KHz; + GHz = 1000 MHz; + end units; + +signal f : frequency := 3.456 MHz; + +begin + test : process is + + + begin + assert frequency'image(2 MHz) = "2000 khz"; + assert frequency'image(f) = "3456 khz"; + + assert frequency'value("2000 khz") = 2 MHz ; + assert frequency'value("2345 khz") = 2.345 MHz ; + assert frequency'value("2 MHz") = 2000 kHz ; + + assert frequency'value("2.345 Mhz") = 2345 kHz ; + assert frequency'value(s) = 2345 kHz ; + assert frequency'value(s2) = 2345 kHz ; + wait; + end process; + +end architecture test; diff --git a/testsuite/gna/bug20255/testsuite.sh b/testsuite/gna/bug20255/testsuite.sh new file mode 100755 index 0000000..51d7305 --- /dev/null +++ b/testsuite/gna/bug20255/testsuite.sh @@ -0,0 +1,13 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze test.vhd +elab_simulate e + +analyze test_20255.vhd +elab_simulate e + +clean + +echo "Test successful" diff --git a/testsuite/gna/bug20597/20597.vhd b/testsuite/gna/bug20597/20597.vhd new file mode 100644 index 0000000..3294762 --- /dev/null +++ b/testsuite/gna/bug20597/20597.vhd @@ -0,0 +1,27 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity e is +end entity e; + +architecture a of e is + +signal operator_for_cmp : std_logic_vector(7 downto 0) := (others => 'X'); + +begin + +process (operator_for_cmp) is +begin + case operator_for_cmp is + when "00000000" => + null; + when "00000001" => + null; + when "00000002" => -- Me being stupid + null; + when "00000003" => --Again + when others => null; + end case; +end process; + +end architecture; diff --git a/testsuite/gna/bug20597/testsuite.sh b/testsuite/gna/bug20597/testsuite.sh new file mode 100755 index 0000000..11438e4 --- /dev/null +++ b/testsuite/gna/bug20597/testsuite.sh @@ -0,0 +1,12 @@ +#! /bin/sh + +. ../../testenv.sh + +#echo "Skipped !!!!!!!!" +#exit 0 + +analyze_failure 20597.vhd + +clean + +echo "Test successful" diff --git a/testsuite/gna/bug7751/7751_tests.vhd b/testsuite/gna/bug7751/7751_tests.vhd new file mode 100644 index 0000000..8feebc0 --- /dev/null +++ b/testsuite/gna/bug7751/7751_tests.vhd @@ -0,0 +1,119 @@ +entity top is +end top; + +architecture sim of top is + +-------------- static value ---------------------- + + -- static value : enumeration + constant boolstr : string := "false"; + constant off : boolean := boolean'value("FALSE"); + -- static value : integer + constant numstr : string := "5"; + -- static value : float + constant fpstr1 : string := "123.4567"; + constant fpstr2 : string := "123.4567e-3"; + constant fpstr3 : string := "-123.4567e4"; + + constant fp0 : real := real'value("123.4567"); + constant fp1 : real := real'value(fpstr1); + constant fp2 : real := real'value(fpstr2); + constant fp3 : real := real'value(fpstr3); + + -- static value : physical + constant t_val_static : time := time'value("123 ns"); + +-------------- static image ---------------------- + + -- static image : enumeration + constant bool_img1 : string := boolean'image(False); + constant bool_img2 : string := boolean'image(True); + + -- static image : integer + constant int_img : string := integer'image(123); + + -- static image : float + constant fpimg0 : string := real'image(fp0); + constant fpimg1 : string := real'image(fp1); + constant fpimg2 : string := real'image(fp2); + constant fpimg3 : string := real'image(fp3); + + constant t_img_static : string := time'image(456 ps); + -- physical types always evaluated at runtime... + +-------------- runtime value ---------------------- + -- runtime integer + signal my_int : integer := 5; + signal my_str1 : string(1 to 1) := "5"; + -- runtime boolean + signal my_bool : boolean := true; + + -- runtime float + signal my_flt : real := 0.0; + +-------------- runtime image ---------------------- + -- runtime(signal) physical + signal t : time := time'value("789 US"); + + function t_img (t : time) return string is + begin + return time'image(t); + end t_img; + + +begin +-- Value tests : static enumeration expressions. + Assert boolean'value("FALSE") report "Bool Assertion triggered" severity NOTE; + Assert boolean'value(boolstr) report "Bool Assertion triggered" severity NOTE; +-- Value tests : static integer expressions. + Assert 2 + 2 = natural'value("5") report "Integer Assertion triggered" severity NOTE; + Assert 2 + 2 = natural'value(numstr) report "Integer Assertion triggered" severity NOTE; +-- Value tests : static real expressions. + Assert false report "real'value(""123.4567"" = " & real'image(fp0) severity NOTE; +-- Value tests : static physical expressions. Use time and at least one other phys unit. + Assert false report "123 ns is " & time'image(t_val_static) severity note; +-- To check compiler error diagnosis, uncomment these. +-- Assert boolean'value(79) report "Assertion triggered" severity NOTE; +-- Assert boolean'value(False) report "Assertion triggered" severity NOTE; +-- Assert boolean'value("SILLY") report "Assertion triggered" severity NOTE; + + +-- Image tests : static enumeration expressions. + Assert false report "Boolean can be " & boolean'image(True) & " or " & boolean'image(False) severity Note; + Assert false report "Static Boolean can be " & bool_img1 & " or " & bool_img2 severity Note; +-- Image tests : static integer expressions. + Assert false report "Integer image of 123 is " & int_img severity note; +-- Image tests : static real expressions. + Assert false report "123.4567" & " = " & fpimg0 severity note; + Assert false report "123.4567" & " = " & real'image(fp0) severity note; + Assert false report "124.4567" & " = " & real'image(fp0 + 1.0) severity note; + -- These assert despite nominally equal values. + Assert fp0 = real'value(fpimg0) report "123.4567" & " = " & fpimg0 severity note; + Assert fp1 = real'value(fpimg1) report fpstr1 & " = " & fpimg1 severity note; + Assert fp2 = real'value(fpimg2) report fpstr2 & " = " & fpimg2 severity note; + Assert fp3 = real'value(fpimg3) report fpstr3 & " = " & fpimg3 severity note; + -- So verify that the differences are not actually 0 + Assert false report "fp0 - real'value(fpimg0) = " & real'image(fp0 - real'value(fpimg0)) severity note; + Assert false report "fp1 - real'value(fpimg1) = " & real'image(fp1 - real'value(fpimg1)) severity note; + Assert false report "fp2 - real'value(fpimg2) = " & real'image(fp2 - real'value(fpimg2)) severity note; + Assert false report "fp3 - real'value(fpimg3) = " & real'image(fp3 - real'value(fpimg3)) severity note; + -- Image tests : static physical expressions + Assert false report "456 ps is " & t_img_static severity note; + +-- Value tests : runtime expressions + Assert boolean'value("FALSE") report "Assertion triggered" severity NOTE; + Assert boolean'value(boolstr) report "Assertion triggered" severity NOTE; + Assert my_bool report "Boolean my_bool = " & boolean'image(my_bool) severity NOTE; + + my_str1(1) <= '6' after 1 ns, '4' after 2 ns; + my_flt <= fp0 after 3 ns; + my_bool <= False after 4 ns; + Assert my_flt = 0.0 report "my_flt = " & real'image(my_flt) severity note; + Assert 2 + 2 = natural'value(my_str1) report "RT Assertion 1 triggered" severity NOTE; + Assert 2 + 2 /= natural'value(my_str1) report "RT Assertion 2 triggered" severity NOTE; + Assert my_bool report "Boolean my_bool = " & boolean'image(my_bool) severity NOTE; + +-- Image tests : runtime physical expressions. + Assert false report "Time " & t_img(123 us) severity note; + +end sim; diff --git a/testsuite/gna/bug7751/testsuite.sh b/testsuite/gna/bug7751/testsuite.sh new file mode 100755 index 0000000..c927f8f --- /dev/null +++ b/testsuite/gna/bug7751/testsuite.sh @@ -0,0 +1,10 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze 7751_tests.vhd +elab_simulate top + +clean + +echo "Test successful" diff --git a/testsuite/gna/sr2553/2553.vhd b/testsuite/gna/sr2553/2553.vhd new file mode 100644 index 0000000..858a10b --- /dev/null +++ b/testsuite/gna/sr2553/2553.vhd @@ -0,0 +1,44 @@ +library ieee; + +use ieee.std_logic_1164.all; + +entity e1 is + +port( + +r1: in real; + +slv1: in std_logic_vector(7 downto 0); + +sl1: in std_logic + +); + +end; + +architecture a of e1 is + +begin + +end; + +library ieee; +use ieee.std_logic_1164.all; + +entity e2 is +begin +end; + +architecture a of e2 is +constant r2: integer := 10e6; + +signal slv2: std_logic_vector(7 downto 0); +signal sl2: std_logic; +begin +tx: entity work.e1 +port map( +r1 => real(r2_wrong), +slv1 => slv2, +sl1 => sl2 +); +end; diff --git a/testsuite/gna/sr2553/testsuite.sh b/testsuite/gna/sr2553/testsuite.sh new file mode 100755 index 0000000..42442ee --- /dev/null +++ b/testsuite/gna/sr2553/testsuite.sh @@ -0,0 +1,9 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze_failure 2553.vhd + +clean + +echo "Test successful" diff --git a/testsuite/gna/sr3028/testsuite.sh b/testsuite/gna/sr3028/testsuite.sh new file mode 100755 index 0000000..e63a031 --- /dev/null +++ b/testsuite/gna/sr3028/testsuite.sh @@ -0,0 +1,14 @@ +#! /bin/sh + +. ../../testenv.sh + +echo "Skipped !!!!" +exit 0 + +analyze vc.vhdl +analyze top.vhdl +elab_simulate_failure top + +clean + +echo "Test successful" diff --git a/testsuite/gna/sr3028/top.vhdl b/testsuite/gna/sr3028/top.vhdl new file mode 100644 index 0000000..e194a63 --- /dev/null +++ b/testsuite/gna/sr3028/top.vhdl @@ -0,0 +1,7 @@ +entity top is +end top; + +use work.vc_fakeram_pkg; +architecture behav of top is +begin +end behav; diff --git a/testsuite/gna/sr3028/vc.vhdl b/testsuite/gna/sr3028/vc.vhdl new file mode 100644 index 0000000..b140f82 --- /dev/null +++ b/testsuite/gna/sr3028/vc.vhdl @@ -0,0 +1,4 @@ +package vc_fakeram_pkg is + type memory_type is array (0 to 4294967296) of integer; + shared variable memory:memory_type; +end vc_fakeram_pkg; diff --git a/testsuite/gna/sr3060/integer_class.vhdl b/testsuite/gna/sr3060/integer_class.vhdl new file mode 100644 index 0000000..076fb49 --- /dev/null +++ b/testsuite/gna/sr3060/integer_class.vhdl @@ -0,0 +1,129 @@ +--------------------------------
+-- Copyright 1992-2001 Future Parallel
+-- VLSI Design Lab
+-- Library: VFP
+-- Designer: Tim Pagden
+-- Opened: 02.06.2001
+-- Updated: 12.06.2001
+-- DNH: T:/author/dnh/integer_class.dnh
+--------------------------------
+
+entity integer_class_tb is
+--
+-- tests for integer_class package
+--
+end integer_class_tb;
+
+ use std.textio.all;
+library vfp;
+ use vfp.std_verification.all;
+ use vfp.integer_class.all;
+
+architecture tb0 of integer_class_tb is
+
+begin
+
+ process
+ --variable num_chars : integer;
+ variable j : integer;
+ variable k : integer;
+ variable tfi : boolean;
+ --variable bit_width : integer;
+ variable log_line : line;
+ file log_file : text open write_mode is "intclass.log";
+
+ begin
+ debug("Starting tests...");
+ log(log_file, "======== Start of integer_class tests ========");
+ debug(3);
+ debug("int is ", 3);
+ log(log_file, 3);
+ log(log_file, "int is ", 3);
+ --tb_log(log_file, "==== strlen tests...");
+ --for i in 0 to 9 loop
+ -- log(log_file, string_length(10 ** i));
+ -- log(log_file, string_length(-(10 ** i)));
+ --end loop;
+ log(log_file, "==== binary_wordlength tests...");
+ for i in 0 to 31 loop
+ log(log_file, binary_wordlength(2 ** i));
+ log(log_file, binary_wordlength(-(2 ** i)));
+ --write(log_line, (2 ** i)); -- it's OK 2**31 -> -(2**31) automatically,
+ -- presumably simulator does a shift operation internally!
+ end loop;
+ log(log_file, "==== integer string length tests ...");
+ for i in 0 to 9 loop
+ log(log_file, (integer'IMAGE(10 ** i)))'LENGTH;
+ log(log_file, (integer'IMAGE(-(10 ** i))))'LENGTH;
+ end loop;
+ log(log_file, "==== next_greater_binary_power_minus_1 tests ...");
+ for i in 0 to 31 loop
+ log(log_file, next_greater_binary_power_minus_1(2 ** i));
+ log(log_file, next_greater_binary_power_minus_1(-(2 ** i)));
+ end loop;
+ --tb_log(log_file, "==== is_factor_of_32 tests ...");
+ --for i in 0 to 32 loop
+ -- tfi := is_factor_of_32(i);
+ -- if tfi then
+ -- write(log_line, i);
+ -- write(log_line, string'(" is a factor"));
+ -- -- sprintf("i,s", +integer, string)
+ -- -- unary + takes any operand and returns a string
+ -- -- sprintf("i,s", integer, string)
+ -- writeline(log_file, log_line);
+ -- else
+ -- write(log_line, i);
+ -- write(log_line, string'("..."));
+ -- writeline(log_file, log_line);
+ -- end if;
+ --end loop;
+ write(log_line, string'("==== is_power_of_2 tests ..."));
+ writeline(log_file, log_line);
+ for i in 0 to 31 loop
+ k := 2 ** i;
+ tfi := is_power_of_2(k);
+ if tfi then
+ write(log_line, string'("Correct, "));
+ write(log_line, k);
+ write(log_line, string'(" is a power of 2"));
+ writeline(log_file, log_line);
+ else
+ write(log_line, k);
+ write(log_line, string'(" has not been captured as a power of 2 - it should be!"));
+ writeline(log_file, log_line);
+ end if;
+ end loop;
+ write(log_line, string'("==== log_2 tests ..."));
+ writeline(log_file, log_line);
+ for i in 0 to 31 loop
+ k := (2 ** i)-1;
+ j := log_2(k);
+ write(log_line, k);
+ write(log_line, string'(" , "));
+ write(log_line, j);
+ writeline(log_file, log_line);
+ k := 2 ** i;
+ j := log_2(k);
+ write(log_line, k);
+ write(log_line, string'(" , "));
+ write(log_line, j);
+ writeline(log_file, log_line);
+ k := (2 ** i)+1;
+ j := log_2(k);
+ write(log_line, k);
+ write(log_line, string'(" , "));
+ write(log_line, j);
+ writeline(log_file, log_line);
+ end loop;
+ log(log_file, "======== End of integer_class tests ========");
+ debug("Tests finished.");
+ wait;
+ end process;
+
+end tb0;
+
+configuration integer_class_tb_cfg_0 of integer_class_tb is
+ for tb0
+ end for;
+end integer_class_tb_cfg_0;
+
diff --git a/testsuite/gna/sr3060/testsuite.sh b/testsuite/gna/sr3060/testsuite.sh new file mode 100755 index 0000000..d7f71d7 --- /dev/null +++ b/testsuite/gna/sr3060/testsuite.sh @@ -0,0 +1,9 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze_failure integer_class.vhdl + +clean + +echo "Test successful" diff --git a/testsuite/gna/testsuite.sh b/testsuite/gna/testsuite.sh new file mode 100755 index 0000000..3f14c5d --- /dev/null +++ b/testsuite/gna/testsuite.sh @@ -0,0 +1,48 @@ +#! /bin/sh + +# Driver for the GNA testsuite. +# Each test correspond to one report, and is put in one directory (using +# the support/bug number) + +set -e + +dirs="bug* sr*" +failures="" +full=n + +for opt; do + case "$opt" in + -k | --keep-going) full=y ;; + --dir=*) dirs=`echo $opt | sed -e 's/--dir=//'` ;; + --skip=*) d=`echo $opt | sed -e 's/--skip=//'` + dirs=`echo "" $dirs | sed -e "s/ $d//"` ;; + --start-at=*) d=`echo $opt | sed -e 's/--start-at=//'` + dirs=`echo "" $dirs | sed -e "s/^.* $d//"` + dirs="$d $dirs" ;; + *) echo "Unknown option $opt" + exit 2 + ;; + esac +done + +for i in $dirs; do + echo "GNA dir $i:" + cd $i + if ! ./testsuite.sh; then + if [ $full = "y" ]; then + failures="$failures $i" + else + exit 1; + fi + fi + cd .. +done + +if [ x"$failures" = x"" ]; then + echo "GNA tests are successful" + exit 0 +else + echo "GNA test failed ($failures)" + exit 1 +fi + |