diff options
| -rw-r--r-- | testsuite/gna/ticket97/bug.vhdl | 19 | ||||
| -rwxr-xr-x | testsuite/gna/ticket97/testsuite.sh | 9 |
2 files changed, 28 insertions, 0 deletions
diff --git a/testsuite/gna/ticket97/bug.vhdl b/testsuite/gna/ticket97/bug.vhdl new file mode 100644 index 0000000..6364a66 --- /dev/null +++ b/testsuite/gna/ticket97/bug.vhdl @@ -0,0 +1,19 @@ +library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+entity foo is end entity;
+architecture arch of foo is
+begin
+ process is
+ procedure xyzzy( v : inout unsigned ) is
+ begin
+ v := v + 1;
+ end procedure;
+
+ variable x : std_ulogic_vector( 7 downto 0 );
+ begin
+ -- trying to do an inout conversion triggers the bug:
+ xyzzy( std_ulogic_vector( v ) => unsigned( x ) );
+ wait;
+ end process;
+end architecture;
diff --git a/testsuite/gna/ticket97/testsuite.sh b/testsuite/gna/ticket97/testsuite.sh new file mode 100755 index 0000000..06d43e0 --- /dev/null +++ b/testsuite/gna/ticket97/testsuite.sh @@ -0,0 +1,9 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze bug.vhdl +elab_simulate foo +clean + +echo "Test successful" |