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<!--l. 1--><p class="noindent" >
<!--l. 2--><p class="noindent" ><span
class="cmbx-12x-x-207">eSim</span><br /><br />
<span
class="cmbx-12x-x-144">An open source EDA tool for circuit design,</span>
<span
class="cmbx-12x-x-144">simulation, analysis and PCB design</span><br />
<img
src="figures/logo-trimmed.png" alt="PIC"
>
<span
class="cmbx-12x-x-144">eSim User Manual</span><br />
<span
class="cmr-10">version 1.0.0</span><br />
<span
class="cmbx-10">Prepared By:</span><br />
<span
class="cmr-10">eSim Team</span><br />
<span
class="cmr-10">FOSSEE at IIT,Bombay</span>
<!--l. 17--><p class="noindent" ><img
src="figures/iitblogo.png" alt="PIC"
><br />
<span
class="cmr-10">Indian Institute of Technology Bombay</span><br />
<img
src="esim0x.png" alt="○BY:" class="oalign" > <img
src="esim1x.png" alt="○$\" class="oalign" > <img
src="esim2x.png" alt="○=" class="oalign" > <br />
<span
class="cmr-10">August 2015</span></div>
<h2 class="likechapterHead"><a
id="x1-1000"></a>Contents</h2> <div class="tableofcontents">
<span class="chapterToc" >1 <a
href="#x1-20001" id="QQ2-1-2">Introduction</a></span>
<br /> <span class="chapterToc" >2 <a
href="#x1-30002" id="QQ2-1-3">Installing eSim</a></span>
<br /> <span class="chapterToc" >3 <a
href="#x1-40003" id="QQ2-1-4">Architecture of eSim</a></span>
<br />  <span class="sectionToc" >3.1 <a
href="#x1-50003.1" id="QQ2-1-5">Modules used in eSim</a></span>
<br />   <span class="subsectionToc" >3.1.1 <a
href="#x1-60003.1.1" id="QQ2-1-6">Eeschema</a></span>
<br />   <span class="subsectionToc" >3.1.2 <a
href="#x1-70003.1.2" id="QQ2-1-7">CvPcb</a></span>
<br />   <span class="subsectionToc" >3.1.3 <a
href="#x1-80003.1.3" id="QQ2-1-8">Pcbnew</a></span>
<br />   <span class="subsectionToc" >3.1.4 <a
href="#x1-90003.1.4" id="QQ2-1-9">KiCad to Ngspice converter</a></span>
<br />   <span class="subsectionToc" >3.1.5 <a
href="#x1-100003.1.5" id="QQ2-1-10">Model Builder</a></span>
<br />   <span class="subsectionToc" >3.1.6 <a
href="#x1-110003.1.6" id="QQ2-1-11">Subcircuit Builder</a></span>
<br />   <span class="subsectionToc" >3.1.7 <a
href="#x1-120003.1.7" id="QQ2-1-12">Ngspice</a></span>
<br />  <span class="sectionToc" >3.2 <a
href="#x1-130003.2" id="QQ2-1-13">Work flow of eSim</a></span>
<br /> <span class="chapterToc" >4 <a
href="#x1-140004" id="QQ2-1-15">Getting Started</a></span>
<br />  <span class="sectionToc" >4.1 <a
href="#x1-150004.1" id="QQ2-1-16">eSim Main Window</a></span>
<br />   <span class="subsectionToc" >4.1.1 <a
href="#x1-160004.1.1" id="QQ2-1-17">How to launch eSim in Ubuntu?</a></span>
<br />   <span class="subsectionToc" >4.1.2 <a
href="#x1-170004.1.2" id="QQ2-1-19">Main-GUI</a></span>
<br /> <span class="chapterToc" >5 <a
href="#x1-280005" id="QQ2-1-33">Schematic Creation</a></span>
<br />  <span class="sectionToc" >5.1 <a
href="#x1-290005.1" id="QQ2-1-34">Familiarizing the Schematic Editor interface</a></span>
<br />   <span class="subsectionToc" >5.1.1 <a
href="#x1-300005.1.1" id="QQ2-1-36">Top menu bar</a></span>
<br />   <span class="subsectionToc" >5.1.2 <a
href="#x1-310005.1.2" id="QQ2-1-38">Top toolbar</a></span>
<br />   <span class="subsectionToc" >5.1.3 <a
href="#x1-320005.1.3" id="QQ2-1-40">Toolbar on the right</a></span>
<br />   <span class="subsectionToc" >5.1.4 <a
href="#x1-330005.1.4" id="QQ2-1-42">Toolbar on the left</a></span>
<br />   <span class="subsectionToc" >5.1.5 <a
href="#x1-340005.1.5" id="QQ2-1-44">Hotkeys</a></span>
<br />  <span class="sectionToc" >5.2 <a
href="#x1-350005.2" id="QQ2-1-45">Schematic creation for simulation</a></span>
<br />   <span class="subsectionToc" >5.2.1 <a
href="#x1-360005.2.1" id="QQ2-1-47">Selection and placement of components</a></span>
<br />   <span class="subsectionToc" >5.2.2 <a
href="#x1-370005.2.2" id="QQ2-1-51">Wiring the circuit</a></span>
<br />   <span class="subsectionToc" >5.2.3 <a
href="#x1-380005.2.3" id="QQ2-1-53">Assigning values to components</a></span>
<br />   <span class="subsectionToc" >5.2.4 <a
href="#x1-390005.2.4" id="QQ2-1-55">Annotation and ERC</a></span>
<br />   <span class="subsectionToc" >5.2.5 <a
href="#x1-400005.2.5" id="QQ2-1-59">Netlist generation</a></span>
<br /> <span class="chapterToc" >6 <a
href="#x1-410006" id="QQ2-1-61">PCB Design</a></span>
<br />  <span class="sectionToc" >6.1 <a
href="#x1-420006.1" id="QQ2-1-62">Schematic creation for PCB design</a></span>
<br />   <span class="subsectionToc" >6.1.1 <a
href="#x1-430006.1.1" id="QQ2-1-64">Netlist generation for PCB</a></span>
<br />   <span class="subsectionToc" >6.1.2 <a
href="#x1-440006.1.2" id="QQ2-1-66">Mapping of components using Footprint Editor</a></span>
<br />   <span class="subsectionToc" >6.1.3 <a
href="#x1-450006.1.3" id="QQ2-1-67">Familiarising the Footprint Editor tool</a></span>
<br />   <span class="subsectionToc" >6.1.4 <a
href="#x1-470006.1.4" id="QQ2-1-71">Viewing footprints in 2D and 3D</a></span>
<br />   <span class="subsectionToc" >6.1.5 <a
href="#x1-480006.1.5" id="QQ2-1-75">Mapping of components in the RC circuit</a></span>
<br />  <span class="sectionToc" >6.2 <a
href="#x1-490006.2" id="QQ2-1-77">Creation of PCB layout</a></span>
<br />   <span class="subsectionToc" >6.2.1 <a
href="#x1-500006.2.1" id="QQ2-1-78">Familiarizing the Layout Editor tool</a></span>
<br />   <span class="subsectionToc" >6.2.2 <a
href="#x1-520006.2.2" id="QQ2-1-82">Hotkeys</a></span>
<br />   <span class="subsectionToc" >6.2.3 <a
href="#x1-530006.2.3" id="QQ2-1-83">PCB design example using RC circuit</a></span>
<br /> <span class="chapterToc" >7 <a
href="#x1-540007" id="QQ2-1-98">Model Editor</a></span>
<br />  <span class="sectionToc" >7.1 <a
href="#x1-550007.1" id="QQ2-1-100">Creating New Model Library </a></span>
<br />  <span class="sectionToc" >7.2 <a
href="#x1-560007.2" id="QQ2-1-105">Editing Current Model Library</a></span>
<br />  <span class="sectionToc" >7.3 <a
href="#x1-570007.3" id="QQ2-1-107">Uploading external .lib file to eSim repository</a></span>
<br /> <span class="chapterToc" >8 <a
href="#x1-580008" id="QQ2-1-108">SubCircuit Builder</a></span>
<br />  <span class="sectionToc" >8.1 <a
href="#x1-590008.1" id="QQ2-1-110">Creating a SubCircuit</a></span>
<br />  <span class="sectionToc" >8.2 <a
href="#x1-600008.2" id="QQ2-1-118">Edit a Subcircuit</a></span>
<br /> <span class="chapterToc" >9 <a
href="#x1-610009" id="QQ2-1-119">Solved Examples</a></span>
<br />  <span class="sectionToc" >9.1 <a
href="#x1-620009.1" id="QQ2-1-120">Solved Examples</a></span>
<br />   <span class="subsectionToc" >9.1.1 <a
href="#x1-630009.1.1" id="QQ2-1-121">Basic RC Circuit</a></span>
<br />   <span class="subsectionToc" >9.1.2 <a
href="#x1-660009.1.2" id="QQ2-1-136">Half Wave Rectifier</a></span>
<br />   <span class="subsectionToc" >9.1.3 <a
href="#x1-690009.1.3" id="QQ2-1-143">Precision Rectifier</a></span>
<br />   <span class="subsectionToc" >9.1.4 <a
href="#x1-720009.1.4" id="QQ2-1-150">Inverting Amplifier</a></span>
<br />   <span class="subsectionToc" >9.1.5 <a
href="#x1-750009.1.5" id="QQ2-1-157">Half Adder Example</a></span>
<br /> <span class="chapterToc" > <a
href="#Q1-1-166">References </a></span>
</div>
<h2 class="chapterHead"><span class="titlemark">Chapter 1</span><br /><a
id="x1-20001"></a>Introduction</h2> Electronic systems are an integral part of human life. They have
simplified our lives to a great extent. Starting from small systems made of a few
discrete components to the present day integrated circuits (ICs) with millions of
logic gates, electronic systems have undergone a sea change. As a result, design of
electronic systems too have become extremely difficult and time consuming. Thanks to
a host of computer aided design tools, we have been able to come up with quick
and efficient designs. These are called <span
class="cmtt-10x-x-109">Electronic Design Automation </span>or <span
class="cmtt-10x-x-109">EDA</span>
<a
id="dx1-2001"></a>tools.
<!--l. 20--><p class="noindent" >Let us see the steps involved in EDA.<a
id="dx1-2002"></a> In the first stage, the specifications of the system are
laid out. These specifications are then converted to a design. The design could be in
the form of a circuit schematic, logical description using an HDL language, etc.
The design is then simulated and re-designed, if needed, to achieve the desired
results. Once simulation achieves the specifications, the design is either converted to
a PCB, a chip layout, or ported to an FPGA. The final product is again tested
for specifications. The whole cycle is repeated until desired results are obtained
<span class="cite"> [<a
href="#Xeda">9</a>]</span>.
<!--l. 31--><p class="indent" > A person who builds an electronic system has to first design the circuit, produce a virtual
representation of it through a schematic for easy comprehension, simulate it and finally
convert it into a Printed Circuit Board (PCB). <a
id="dx1-2003"></a>There are various tools available that will help
us do this. Some of the popular EDA tools are those of <span
class="cmtt-10x-x-109">Cadence</span>, <span
class="cmtt-10x-x-109">Synopys</span>, <span
class="cmtt-10x-x-109">Mentor Graphics</span>
and <span
class="cmtt-10x-x-109">Xilinx</span>. Although these are fairly comprehensive and high end, their licenses are
expensive, being proprietary.
<!--l. 40--><p class="indent" > There are some free and open source EDA tools like <span
class="cmtt-10x-x-109">gEDA</span>, <span
class="cmtt-10x-x-109">KiCad </span>and <span
class="cmtt-10x-x-109">Ngspice</span>. The main
drawback of these open source tools is that they are not comprehensive. Some of them are
capable of PCB design (e.g. <span
class="cmtt-10x-x-109">KiCad</span>) while some of them are capable of performing simulations
(e.g. <span
class="cmtt-10x-x-109">gEDA</span>). To the best of our knowledge, there is no open source software that can perform
circuit design, simulation and layout design together. eSim is capable of doing all of the
above.
<!--l. 49--><p class="indent" > eSim is a free and open source EDA tool. It is an acronym for <span
class="cmbx-10x-x-109">E</span>lectronics <span
class="cmbx-10x-x-109">Sim</span>ulation.
eSim is created using open source software packages, such as KiCad, Ngspice and Python. <a
id="dx1-2004"></a><a
id="dx1-2005"></a>
<a
id="dx1-2006"></a>Using eSim, one can create circuit schematics, perform simulations and design PCB
layouts. It can create or edit new device models, and create or edit subcircuits for
simulation.
<!--l. 57--><p class="indent" > Because of these reasons, eSim is expected to be useful for students, teachers and other
professionals who would want to study and/or design electronic systems. eSim is also useful
for entrepreneurs and small scale enterprises who do not have the capability to invest in
heavily priced proprietary tools.
<!--l. 63--><p class="indent" > This book introduces eSim to the reader and illustrates all the features of eSim with
examples. Chapter <a
href="#x1-30002">2<!--tex4ht:ref: chap2 --></a> gives step by step instructions to install eSim on a typical computer
system and to validate the installation. The software architecture of eSim is presented in
Chapter <a
href="#x1-40003">3<!--tex4ht:ref: chap3 --></a>. Chapter <a
href="#x1-140004">4<!--tex4ht:ref: chap4 --></a> gets the user started with eSim. It takes them through a tour
of eSim with the help of a simple RC circuit example. Chapter 5 illustrates how
to simulate circuits. Chapter 6 explains PCB design using eSim, in detail. The
advanced features of eSim such as Model Builder covered in Chapter 7 and Sub
circuiting is covered in Chapter 8. Chapter <a
href="#x1-610009">9<!--tex4ht:ref: chap5 --></a> illustrates how to use eSim for solving
problems.
<!--l. 73--><p class="indent" > The following convention has been adopted throughout this manual.All the
menu names, options under each menu item, tool names, certain points to be noted,
etc., are given in <span
class="cmti-10x-x-109">italics</span>. Some keywords, names of certain windows/dialog boxes,
names of some files/projects/folders, messages displayed during an activity, names
of websites, component references, etc., are given in <span
class="cmtt-10x-x-109">typewriter </span>font. Some key
presses, e.g. <span
class="cmtt-10x-x-109">Enter </span>key, <span
class="cmtt-10x-x-109">F1 </span>key, <span
class="cmtt-10x-x-109">y </span>for yes, etc., are also mentioned in <span
class="cmtt-10x-x-109">typewriter</span>
font.
<h2 class="chapterHead"><span class="titlemark">Chapter 2</span><br /><a
id="x1-30002"></a>Installing eSim</h2>
<dl class="enumerate"><dt class="enumerate">
1. </dt><dd
class="enumerate"><span
class="cmbx-10x-x-109">eSim installation in Ubuntu:</span><br
class="newline" />After downloading the zip file from https://github.com/FOSSEE/eSim to a local
directory unpack it using:<br
class="newline" />      <span
class="cmbx-10x-x-109">$ unzip eSim.zip </span><br
class="newline" />Now change directories in to the top-level source directory (where this INSTALL
file can be found).
<!--l. 13--><p class="noindent" >To install eSim and other dependecies run the following command. <br
class="newline" />      <span
class="cmbx-10x-x-109">$ ../install-linux.sh –install </span><br
class="newline" />Above script will install eSim along with dependencies.
<!--l. 19--><p class="noindent" >eSim will be installed to /opt/eSim
<!--l. 21--><p class="noindent" >To run eSim you can directly run it from terminal as <br
class="newline" />      <span
class="cmbx-10x-x-109">$ esim </span><br
class="newline" />or you can double click on eSim icon created on desktop after installation.</dd></dl>
<h2 class="chapterHead"><span class="titlemark">Chapter 3</span><br /><a
id="x1-40003"></a>Architecture of eSim</h2>
<!--l. 6--><p class="noindent" >eSim is a CAD <a
id="dx1-4001"></a>tool that helps electronic system designers to design, test and analyse their
circuits. But the important feature of this tool is that it is open source and hence the user can
modify the source as per his/her need. The software provides a generic, modular and
extensible platform for experiment with electronic circuits. This software runs on all
Ubuntu Linux distributions and some flavours of Windows. It uses <span
class="cmtt-10x-x-109">Python</span>, <span
class="cmtt-10x-x-109">KiCad </span>and
<span
class="cmtt-10x-x-109">Ngspice</span>.
<!--l. 13--><p class="indent" > The objective behind the development of eSim is to provide an open source EDA solution
for electronics and electrical engineers. The software should be capable of performing
schematic creation, PCB design and circuit simulation (analog, digital and mixed signal). It
should provide facilities to create new models and components. The architecture of eSim has
been designed by keeping these objectives in mind.
<h3 class="sectionHead"><span class="titlemark">3.1 </span> <a
id="x1-50003.1"></a>Modules used in eSim</h3>
<!--l. 21--><p class="noindent" >Various open-source tools have been used for the underlying build-up of eSim. In this section
we will give a brief idea about all the modules used in eSim.
<!--l. 23--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">3.1.1 </span> <a
id="x1-60003.1.1"></a>Eeschema</h4>
<a
id="dx1-6001"></a>
<a
id="dx1-6002"></a>
<!--l. 24--><p class="noindent" >Eeschema is an integrated software where all functions of circuit drawing, control, layout,
library management and access to the PCB design software are carried out. It is the
schematic editor tool used in KiCad <span class="cite"> [<a
href="#Xeeschema">11</a>]</span>. Eeschema is intended to work with PCB layout
software such as Pcbnew. It provides netlist that describes the electrical connections of the
PCB. Eeschema also integrates a component editor which allows the creation, editing and
visualization of components. It also allows the user to effectively handle the symbol
libraries i.e; import, export, addition and deletion of library components. Eeschema
also integrates the following additional but essential functions needed for a modern
schematic capture software: <a
id="x1-6003r1"></a>1. Design rules check <a
id="dx1-6004"></a>(<span
class="cmtt-10x-x-109">DRC</span>) for the automatic control of
incorrect connections and inputs of components left unconnected. <a
id="x1-6005r2"></a>2. Generation of
layout files in <span
class="cmtt-10x-x-109">POSTSCRIPT</span> <a
id="dx1-6006"></a>or <span
class="cmtt-10x-x-109">HPGL</span> <a
id="dx1-6007"></a>format. <a
id="x1-6008r3"></a>3. Generation of layout files printable via
printer. <a
id="x1-6009r4"></a>4. Bill of material generation. <a
id="x1-6010r5"></a>5. Netlist generation for PCB layout or for
simulation.
This module is indicated by the label 1 in Fig. <a
href="#x1-130011">3.1<!--tex4ht:ref: blockd --></a>.
<!--l. 45--><p class="indent" > As Eeschema is originally intended for PCB Design, there are no fictitious
components<span class="footnote-mark"><a
href="esim2.html#fn1x3"><sup class="textsuperscript">1</sup></a></span><a
id="x1-6011f1"></a>
such as voltage or current sources. Thus, we have added a new library for different types of
voltage and current sources such as sine, pulse and square wave. We have also built a library
which gives printing and plotting solutions. This extension, developed by us for eSim, is
indicated by the label 2 in Fig. <a
href="#x1-130011">3.1<!--tex4ht:ref: blockd --></a>.
<h4 class="subsectionHead"><span class="titlemark">3.1.2 </span> <a
id="x1-70003.1.2"></a>CvPcb</h4>
<a
id="dx1-7001"></a>
<!--l. 58--><p class="noindent" >CvPcb is a tool that allows the user to associate components in the schematic to component
footprints when designing the printed circuit board. CvPcb is the footprint editor tool in
KiCad <span class="cite"> [<a
href="#Xeeschema">11</a>]</span>. Typically the netlist file generated by Eeschema does not specify which printed
circuit board footprint is associated with each component in the schematic. However, this is
not always the case as component footprints can be associated during schematic capture by
setting the component’s footprint field. CvPcb provides a convenient method of associating
footprints to components. It provides footprint list filtering, footprint viewing, and 3D
component model viewing to help ensure that the correct footprint is associated with each
component. Components can be assigned to their corresponding footprints manually or
automatically by creating equivalence files. Equivalence files are look up tables
associating each component with its footprint. This interactive approach is simpler
and less error prone than directly associating footprints in the schematic editor.
This is because CvPcb not only allows automatic association, but also allows to
see the list of available footprints and displays them on the screen to ensure the
correct footprint is being associated. This module is indicated by the label 3 in
Fig. <a
href="#x1-130011">3.1<!--tex4ht:ref: blockd --></a>.
<!--l. 80--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">3.1.3 </span> <a
id="x1-80003.1.3"></a>Pcbnew</h4>
<a
id="dx1-8001"></a>
<!--l. 81--><p class="noindent" >Pcbnew is a powerful printed circuit board software tool. It is the layout editor tool
used in KiCad <span class="cite"> [<a
href="#Xeeschema">11</a>]</span>. It is used in association with the schematic capture software
Eeschema, which provides the netlist. Netlist describes the electrical connections of
the circuit. CvPcb is used to assign each component, in the netlist produced by
Eeschema, to a module that is used by Pcbnew. The features of Pcbnew are given
below:
<ul class="itemize1">
<li class="itemize">It manages libraries of modules. Each module is a drawing of the physical
component including its footprint<a
id="dx1-8002"></a> - the layout of pads providing connections to the
component. The required modules are automatically loaded during the reading of
the netlist produced by CvPcb.
</li>
<li class="itemize">Pcbnew integrates automatically and immediately any circuit modification by
removal of any erroneous tracks, addition of new components, or by modifying
any value (and under certain conditions any reference) of old or new modules,
according to the electrical connections appearing in the schematic.
</li>
<li class="itemize">This tool provides a rats nest display, a hairline connecting the pads of modules
connected on the schematic. These connections move dynamically as track and
module movements are made.
</li>
<li class="itemize">It has an active Design Rules Check (<span
class="cmtt-10x-x-109">DRC</span>) which automatically indicates any error
of track layout in real time.
</li>
<li class="itemize">It automatically generates a copper plane, with or without thermal breaks on the
pads.
</li>
<li class="itemize">It has a simple but effective auto router to assist in the production of the
circuit. An export/import in <span
class="cmtt-10x-x-109">SPECCTRA </span>dsn format allows to use more advanced
auto-routers.
</li>
<li class="itemize">It provides options specifically for the production of ultra high frequency circuits
(such as pads of trapezoidal and complex form, automatic layout of coils on the
printed circuit).
</li>
<li class="itemize">Pcbnew displays the elements (tracks, pads, texts, drawings and more) as actual size
and according to personal preferences such as:
<ul class="itemize2">
<li class="itemize">display in full or outline.
</li>
<li class="itemize">display the track/pad clearance.</li></ul>
</li></ul>
<!--l. 121--><p class="noindent" >This module is indicated by the label 4 in Fig. <a
href="#x1-130011">3.1<!--tex4ht:ref: blockd --></a>.
<h4 class="subsectionHead"><span class="titlemark">3.1.4 </span> <a
id="x1-90003.1.4"></a>KiCad to Ngspice converter</h4>
<!--l. 124--><p class="noindent" >We can provide analysis parameters, and the source details through this module. It also
allows us to add and edit the device models and subcircuits, included in the circuit
schematic. Finally, this module facilitates the conversion of KiCad netlist to Ngspice
compatible ones. It is developed by us for eSim and it is indicated by the label 7 in
Fig. <a
href="#x1-130011">3.1<!--tex4ht:ref: blockd --></a>.
<!--l. 149--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">3.1.5 </span> <a
id="x1-100003.1.5"></a>Model Builder</h4>
<a
id="dx1-10001"></a>
<!--l. 150--><p class="noindent" >This tool provides the facility to define a new model for devices such as, <a
id="x1-10002r1"></a>1. Diode <a
id="x1-10003r2"></a>2. Bipolar
Junction Transistor (BJT) <a
id="x1-10004r3"></a>3. Metal Oxide Semiconductor Field Effect Transistor
(MOSFET) <a
id="x1-10005r4"></a>4. Junction Field Effect Transistor (JFET) <a
id="x1-10006r5"></a>5. IGBT and <a
id="x1-10007r6"></a>6. Magnetic
core.
This module also helps edit existing models. It is developed by us for eSim and it is indicated
by the label 5 in Fig. <a
href="#x1-130011">3.1<!--tex4ht:ref: blockd --></a>.
<!--l. 164--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">3.1.6 </span> <a
id="x1-110003.1.6"></a>Subcircuit Builder</h4>
<a
id="dx1-11001"></a>
<!--l. 164--><p class="noindent" >This module allows the user to create a subcircuit for a component. Once the subcircuit for a
component is created, the user can use it in other circuits. It has the facility to define new
components such as, Op-amps and IC-555. This component also helps edit existing
subcircuits. This module is developed by us for eSim and it is indicated by the label 6 in
Fig. <a
href="#x1-130011">3.1<!--tex4ht:ref: blockd --></a>.
<!--l. 172--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">3.1.7 </span> <a
id="x1-120003.1.7"></a>Ngspice</h4>
<a
id="dx1-12001"></a>
<!--l. 173--><p class="noindent" >Ngspice is a general purpose circuit simulation program for nonlinear dc, nonlinear transient,
and linear ac analysis <span class="cite"> [<a
href="#Xngspice-web">12</a>]</span>. Circuits may contain resistors, capacitors, inductors, mutual
inductors, independent voltage and current sources, four types of dependent sources, lossless
and lossy transmission lines (two separate implementations), switches, uniform
distributed RC lines, and the five most common semiconductor devices: diodes,
<a
id="dx1-12002"></a>BJTs, <a
id="dx1-12003"></a>JFETs, MESFETs, and MOSFET. <a
id="dx1-12004"></a>This module is indicated by the label 9 in
Fig. <a
href="#x1-130011">3.1<!--tex4ht:ref: blockd --></a>.
<!--l. 184--><p class="noindent" >
<h3 class="sectionHead"><span class="titlemark">3.2 </span> <a
id="x1-130003.2"></a>Work flow of eSim</h3>
<!--l. 185--><p class="noindent" >Fig. <a
href="#x1-130011">3.1<!--tex4ht:ref: blockd --></a> shows the work flow in eSim. The block diagram consists of mainly three
parts:
<ul class="itemize1">
<li class="itemize">Schematic Editor
</li>
<li class="itemize">PCB Layout Editor
</li>
<li class="itemize">Circuit Simulators</li></ul>
<!--l. 193--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-130011"></a>
<!--l. 196--><p class="noindent" ><img
src="figures/blockdiagram.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 3.1: </span><span
class="content">Work flow in eSim. (Boxes with dotted lines denote the modules developed
in this work).</span></div><!--tex4ht:label?: x1-130011 -->
<!--l. 201--><p class="indent" > </div><hr class="endfigure">
<!--l. 203--><p class="indent" > Here we explain the role of each block in designing electronic systems. Circuit design is the
first step in the design of an electronic circuit. Generally a circuit diagram is drawn on a
paper, and then entered into a computer using a schematic editor. Eeschema is the schematic
editor for eSim. Thus all the functionalities of Eeschema are naturally available in eSim.
<a
id="dx1-13002"></a>
<!--l. 210--><p class="indent" > Libraries for components, explicitly or implicitly supported by Ngspice, have been created
using the features of Eeschema. As Eeschema is originally intended for PCB design, there are
no fictitious components such as voltage or current sources. Thus, a new library for different
types of voltage and current sources such as sine, pulse and square wave, has been added in
eSim. A library which gives the functionality of printing and plotting has also been
created.
<!--l. 219--><p class="indent" > The schematic editor provides a netlist file, which describes the electrical connections of
the design. In order to create a PCB layout, physical components are required to be mapped
into their footprints. To perform component to footprint mapping, CvPcb is used. Footprints
have been created for the components in the newly created libraries. Pcbnew is used to draw
a PCB layout.
<!--l. 227--><p class="indent" > After designing a circuit, it is essential to check the integrity of the circuit design. In the
case of large electronic circuits, breadboard testing is impractical. In such cases, electronic
system designers rely heavily on simulation. The accuracy of the simulation results can be
increased by accurate modeling of the circuit elements. Model Builder provides the facility to
define a new model for devices and edit existing models. Complex circuit elements can be
created by hierarchical modeling. Subcircuit Builder provides an easy way to create a
subcircuit.
<!--l. 238--><p class="indent" > The netlist generated by Schematic Editor cannot be directly used for simulation due to
compatibility issues. Netlist Converter converts it into Ngspice compatible format. The
type of simulation to be performed and the corresponding options are provided
through a graphical user interface (GUI). This is called KiCad to Ngspice Converter in
eSim.
<!--l. 245--><p class="indent" > eSim uses Ngspice for analog, digital, mixed-level/mixed-signal circuit simulation. Ngspice
is based on three open source software packages<span class="cite"> [<a
href="#Xspice">14</a>]</span>:
<ul class="itemize1">
<li class="itemize">Spice3f5 (analog circuit simulator)
</li>
<li class="itemize">Cider1b1 (couples Spice3f5 circuit simulator to DSIM device simulator)
</li>
<li class="itemize">Xspice (code modeling support and simulation of digital components through an
event driven algorithm)</li></ul>
<!--l. 253--><p class="noindent" >It is a part of gEDA <a
id="dx1-13003"></a>project. Ngspice is capable of simulating devices with BSIM, <a
id="dx1-13004"></a>EKV, HICUM, <a
id="dx1-13005"></a><a
id="dx1-13006"></a>
HiSim, <a
id="dx1-13007"></a>PSP, <a
id="dx1-13008"></a>and PTM <a
id="dx1-13009"></a>models. It is widely used due to its accuracy even for the latest
technology devices.
<h2 class="chapterHead"><span class="titlemark">Chapter 4</span><br /><a
id="x1-140004"></a>Getting Started</h2>
<!--l. 5--><p class="noindent" >In this chapter we will get started with eSim. We will run through the various options
available with an example circuit. Referring to this chapter will make one familiar with
eSim and will help plan the project before actually designing a circuit. Lets get
started.
<h3 class="sectionHead"><span class="titlemark">4.1 </span> <a
id="x1-150004.1"></a>eSim Main Window</h3>
<!--l. 12--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">4.1.1 </span> <a
id="x1-160004.1.1"></a>How to launch eSim in Ubuntu?</h4>
<!--l. 13--><p class="noindent" >After installation is completed, to launch eSim 1. Go to terminal.<br
class="newline" />2. Type <span
class="cmbx-10x-x-109">esim </span>and hit enter.<br
class="newline" />The first window that appears is workspace dialog as shown in Fig. <a
href="#x1-160011">4.1<!--tex4ht:ref: workspace --></a>. <hr class="figure"><div class="figure"
>
<a
id="x1-160011"></a>
<!--l. 19--><p class="noindent" ><img
src="figures/workspace.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 4.1: </span><span
class="content">eSim-Workspace</span></div><!--tex4ht:label?: x1-160011 -->
<!--l. 22--><p class="indent" > </div><hr class="endfigure">
<!--l. 24--><p class="indent" > The default workspace is eSim-Workspace under home directory. To create new workspace
use <span
class="cmti-10x-x-109">browse </span>option.
<h4 class="subsectionHead"><span class="titlemark">4.1.2 </span> <a
id="x1-170004.1.2"></a>Main-GUI</h4>
<!--l. 27--><p class="noindent" >The main GUI window of eSim is as shown in Fig. <a
href="#x1-170012">4.2<!--tex4ht:ref: maingui --></a> <hr class="figure"><div class="figure"
>
<a
id="x1-170012"></a>
<!--l. 30--><p class="noindent" ><img
src="figures/maingui.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 4.2: </span><span
class="content">eSim Main GUI</span></div><!--tex4ht:label?: x1-170012 -->
<!--l. 33--><p class="indent" > </div><hr class="endfigure">
<!--l. 34--><p class="indent" > The eSim main window consists of the following symbols.
<dl class="enumerate"><dt class="enumerate">
1. </dt><dd
class="enumerate">Toolbar
</dd><dt class="enumerate">
2. </dt><dd
class="enumerate">Menubar
</dd><dt class="enumerate">
3. </dt><dd
class="enumerate">Project explorer
</dd><dt class="enumerate">
4. </dt><dd
class="enumerate">Dockarea
</dd><dt class="enumerate">
5. </dt><dd
class="enumerate">Console area</dd></dl>
<h5 class="subsubsectionHead"><a
id="x1-180004.1.2"></a>Toolbar</h5>
<!--l. 44--><p class="noindent" ><hr class="figure"><div class="figure"
>
<a
id="x1-180013"></a>
<!--l. 46--><p class="noindent" ><img
src="figures/guitoolbar.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 4.3: </span><span
class="content">Toolbar</span></div><!--tex4ht:label?: x1-180013 -->
<!--l. 49--><p class="noindent" ></div><hr class="endfigure">
<ul class="itemize1">
<li class="itemize">Open Schematic: The first tool on the toolbar i.e. <span
class="cmti-10x-x-109">Schematic Editor</span><a
id="dx1-18002"></a>. Clicking on
this button will open Eeschema, the KiCad schematic editor.
</li>
<li class="itemize">Convert KiCad to Ngspice: This converter converts KiCad spice netlist into
Ngspice compatible netlist. The KiCad to Ngspice window consists of total five
tabs as namely <span
class="cmti-10x-x-109">Analysis, Device Model, Source Details, Model Library, Subcircuits</span>.
Once the values have been entered, press the <span
class="cmtt-10x-x-109">Convert </span>key. It will generate
<span
class="cmtt-10x-x-109">.cir.out </span>file in the same project directory.<br
class="newline" />Note that <span
class="cmti-10x-x-109">KiCad to Ngspice Converter </span>can only be used if current project has
created the KiCad spice netlist file <span
class="cmtt-10x-x-109">.cir</span>.<br
class="newline" />
<!--l. 62--><p class="noindent" >The details of tabs under KiCad to Ngspice converter are as follows:<br
class="newline" />
<h5 class="subsubsectionHead"><a
id="x1-190004.1.2"></a>Analysis</h5>
<!--l. 65--><p class="noindent" >This feature helps the user to perform different types of analysis such as Operating
point analysis, <a
id="dx1-19001"></a>DC analysis, <a
id="dx1-19002"></a>AC analysis, <a
id="dx1-19003"></a>transient analysis. <a
id="dx1-19004"></a>It has the facility
to
<ul class="itemize2">
<li class="itemize">Insert type of analysis such as AC or DC or Transient
</li>
<li class="itemize">Insert values for analysis</li></ul>
<!--l. 73--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-200004.1.2"></a>Source Details</h5>
<!--l. 74--><p class="noindent" >eSim sources are added from <span
class="cmtt-10x-x-109">eSim</span><span
class="cmtt-10x-x-109">_Sources </span>library. Source such as <span
class="cmti-10x-x-109">SINE, AC, DC,</span>
<span
class="cmti-10x-x-109">PULSE </span>are in this library. The parameter values to all the sources added in the
shcematic can be given through ’Source Details’.
<!--l. 76--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-210004.1.2"></a>Ngspice Model</h5>
<!--l. 77--><p class="noindent" >Ngspice has in built model such as <span
class="cmti-10x-x-109">flipflop(D,SR,JK,T),gain,summer </span>etc. which can be
utilised while building a circuit. eSim allows to add and modify Ngspice model
parameter through Ngspice Model tab.
<!--l. 80--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-220004.1.2"></a>Device Modeling</h5>
<!--l. 81--><p class="noindent" >Devices like <span
class="cmti-10x-x-109">Diode, JFET, MOSFET, IGBT, MOS </span>etc used in the circuit can be
modeled using device model libraries. eSim also provides editing and adding new model
libraries. While converting KiCad to Ngspice, these library files are added to the
corresponding devices used in the circuit.
<!--l. 83--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-230004.1.2"></a>Subcircuits</h5>
<!--l. 84--><p class="noindent" >Subcircuits are circuits within circuit. Subcircuiting helps to reuse the parts of the
circuits. The subcircuits in the main circuits are added using this facility. Also, eSim
provides us with the facility to edit already existing subcircuits.
</li>
<li class="itemize">Simulation: The netlist generated using the <span
class="cmti-10x-x-109">KiCad to Ngspice </span>converter is
simulated using simulation button. Clicking on the <span
class="cmti-10x-x-109">Simulation </span>button will run
the Ngspice simulation for current project. Python plotting window will open, as
shown in Fig. <a
href="#x1-230014">4.4<!--tex4ht:ref: simulation-op --></a>. It shows the output waveform of current project. In the
Ngspice tab we can view the output plotted by Ngspice. <hr class="figure"><div class="figure"
><a
id="x1-230014"></a> <img
src="figures/simulation-op.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 4.4: </span><span
class="content">Simulation Output in Python Plotting Window</span></div><!--tex4ht:label?: x1-230014 -->
<!--l. 94--><p class="noindent" ></div><hr class="endfigure">
</li>
<li class="itemize">Foot Print Editor: Clicking on the <span
class="cmti-10x-x-109">Footprint Editor </span>tool will open the <span
class="cmtt-10x-x-109">CvPcb</span>
<a
id="dx1-23002"></a>window. This window will ideally open the .net file for the current project. So,
before using this tool, one should have the netlist for PCB design (a .net
file).
</li>
<li class="itemize">PCB Layout: Clicking on the <span
class="cmti-10x-x-109">Layout Editor </span>tool will open <span
class="cmtt-10x-x-109">Pcbnew</span><a
id="dx1-23003"></a>, the layout editor
used in eSim. In this window, one will create the PCB. It involves laying
tracks and vias, performing optimum routing of tracks, creating one or more
copper layers for PCB, etc. It will be saved as a <span
class="cmtt-10x-x-109">.brd </span>file in the current project
directory.
</li>
<li class="itemize">Model Editor: eSim also gives an option to re-configure the model library of a device. It
facilitates the user to change model library of devices such as diode, transistor,
MOSFET, etc.
</li>
<li class="itemize">Subcircuit: eSim has an option to build subcircuits. The subcircuits can again have
components having subcircuits and so on. This enables users to build commonly used
circuits as subcircuits and then use it across circuits. For example, one can build a 12
Volt power supply as a subcircuit and then use it as just a single component across
circuits without having to recreate it. Clicking on <span
class="cmti-10x-x-109">Subcircuit Builder </span>tool will allow one
to edit or create a subcircuit.
<!--l. 126--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-240004.1.2"></a>Menubar</h5>
<ul class="itemize2">
<li class="itemize">New Project: New projects are created in the eSim-workspace. When this
menu is selected, a new window opens up with <span
class="cmtt-10x-x-109">Enter Project name </span>field.
Type the name of the new project and click on OK. A project directory will
be created in eSim-Workspace. The name of this folder will be the same as
that of the project created. Make sure project name does not have any spaces.
</li>
<li class="itemize">Open Project: This opens the file dialog of defalut workspace where the
projects are stored. The project can be selected which is then added in the
project explorer.
</li>
<li class="itemize">Exit: This button closes the project window and exits.
</li>
<li class="itemize">Help: It opens user manual in the dockarea.</li></ul>
<!--l. 141--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-250004.1.2"></a>Project Explorer</h5>
<!--l. 142--><p class="noindent" >Project explorer has tree of all the project previously added in it. On right clicking the
project we can simply remove or refresh the project in the explorer. Also on
double/right clicking, the project file can be opened in the text editor which can then be
edited.
<!--l. 145--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-260004.1.2"></a>Dockarea</h5>
<!--l. 146--><p class="noindent" >This area is used to open the following windows.
<dl class="enumerate"><dt class="enumerate">
1. </dt><dd
class="enumerate">KiCad to Ngspice converter
</dd><dt class="enumerate">
2. </dt><dd
class="enumerate">Ngspice plotting
</dd><dt class="enumerate">
3. </dt><dd
class="enumerate">Python plotting
</dd><dt class="enumerate">
4. </dt><dd
class="enumerate">Model builder
</dd><dt class="enumerate">
5. </dt><dd
class="enumerate">Subcircuit builder</dd></dl>
<!--l. 155--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-270004.1.2"></a>Console Area</h5>
<!--l. 156--><p class="noindent" >Console area provides information about the activity done in current project.
</li></ul>
<h2 class="chapterHead"><span class="titlemark">Chapter 5</span><br /><a
id="x1-280005"></a>Schematic Creation</h2> The first step in the design of an electronic system is the
design of its circuit. This circuit is usually created using a <span
class="cmtt-10x-x-109">Schematic Editor</span><a
id="dx1-28001"></a> and is called a
<span
class="cmtt-10x-x-109">Schematic</span>. <a
id="dx1-28002"></a>eSim uses <span
class="cmtt-10x-x-109">Eeschema</span> <a
id="dx1-28003"></a>as its schematic editor. Eeschema is the schematic editor of
KiCad. <a
id="dx1-28004"></a>It is a powerful schematic editor software. It allows the creation and modification of
components and symbol libraries and supports multiple hierarchical layers of printed circuit
design.
<h3 class="sectionHead"><span class="titlemark">5.1 </span> <a
id="x1-290005.1"></a>Familiarizing the Schematic Editor interface</h3>
<!--l. 22--><p class="noindent" >Fig. <a
href="#x1-290011">5.1<!--tex4ht:ref: eesch1 --></a> shows the schematic editor and the various menu and toolbars. We will explain them
briefly in this section. <hr class="figure"><div class="figure"
>
<a
id="x1-290011"></a>
<div class="center"
>
<!--l. 25--><p class="noindent" >
<!--l. 26--><p class="noindent" ><img
src="figures/schematic1.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.1: </span><span
class="content">Schematic editor with the menu bar and toolbars marked</span></div><!--tex4ht:label?: x1-290011 -->
</div>
<!--l. 30--><p class="indent" > </div><hr class="endfigure">
<h4 class="subsectionHead"><span class="titlemark">5.1.1 </span> <a
id="x1-300005.1.1"></a>Top menu bar</h4>
<!--l. 35--><p class="noindent" >The top menu bar will be available at the top left corner. Some of the important menu
options in the top menu bar are:
<dl class="compactenum"><dt class="compactenum">
1. </dt><dd
class="compactenum">File - The file menu items are given below:
<dl class="compactenum"><dt class="compactenum">
(a) </dt><dd
class="compactenum">New - Clear current schematic and start a new one
</dd><dt class="compactenum">
(b) </dt><dd
class="compactenum">Open - Open a schematic
</dd><dt class="compactenum">
(c) </dt><dd
class="compactenum">Open Recent - A list of recently opened files for loading
</dd><dt class="compactenum">
(d) </dt><dd
class="compactenum">Save Whole Schematic project - Save current sheet and all its hierarchy.
</dd><dt class="compactenum">
(e) </dt><dd
class="compactenum">Save Current Sheet Only - Save current sheet, but not others in a hierarchy.
</dd><dt class="compactenum">
(f) </dt><dd
class="compactenum">Save Current sheet as - Save current sheet with a new name.
</dd><dt class="compactenum">
(g) </dt><dd
class="compactenum">Print - Access to print menu (See Fig. <a
href="#x1-300112">5.2<!--tex4ht:ref: print --></a>).
</dd><dt class="compactenum">
(h) </dt><dd
class="compactenum">Plot - Plot the schematic in Postscript, HPGL, SVF or DXF format
</dd><dt class="compactenum">
(i) </dt><dd
class="compactenum">Quit - Quit the schematic editor.</dd></dl>
<!--l. 53--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-300112"></a>
<div class="center"
>
<!--l. 54--><p class="noindent" >
<!--l. 55--><p class="noindent" ><img
src="figures/print.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.2: </span><span
class="content">Print options</span></div><!--tex4ht:label?: x1-300112 -->
</div>
<!--l. 59--><p class="noindent" ></div><hr class="endfigure">
</dd><dt class="compactenum">
2. </dt><dd
class="compactenum">Place - The place menu has shortcuts for placing various items like components, wire
and junction, on to the schematic editor window. See Sec. <a
href="#x1-340005.1.5">5.1.5<!--tex4ht:ref: short --></a> to know more about
various shortcut keys (hotkeys).
</dd><dt class="compactenum">
3. </dt><dd
class="compactenum">Preferences - The preferences menu has the following options:
<dl class="compactenum"><dt class="compactenum">
(a) </dt><dd
class="compactenum">Library - Select libraries and library paths
</dd><dt class="compactenum">
(b) </dt><dd
class="compactenum">Colors - Select colors for various items.
</dd><dt class="compactenum">
(c) </dt><dd
class="compactenum">Options - Display schematic editor options (Units, Grid size).
</dd><dt class="compactenum">
(d) </dt><dd
class="compactenum">Language - Shows the current list of translations. Use default.
</dd><dt class="compactenum">
(e) </dt><dd
class="compactenum">Hotkeys - Access to the hot keys menu. See Sec. <a
href="#x1-340005.1.5">5.1.5<!--tex4ht:ref: short --></a> about hotkeys.
</dd><dt class="compactenum">
(f) </dt><dd
class="compactenum">Read preferences - Read configuration file.
</dd><dt class="compactenum">
(g) </dt><dd
class="compactenum">Save preferences - Save configuration file.</dd></dl>
</dd></dl>
<!--l. 79--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">5.1.2 </span> <a
id="x1-310005.1.2"></a>Top toolbar</h4>
<a
id="dx1-31001"></a>
<a
id="dx1-31002"></a>
<!--l. 80--><p class="noindent" >Some of the important tools in the top toolbar are discussed below. They are marked in
Fig. <a
href="#x1-310033">5.3<!--tex4ht:ref: eeschem2 --></a>. <hr class="figure"><div class="figure"
>
<a
id="x1-310033"></a>
<!--l. 84--><p class="noindent" ><img
src="figures/toptoolbar.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.3: </span><span
class="content">Toolbar on top with important tools marked</span></div><!--tex4ht:label?: x1-310033 -->
<!--l. 87--><p class="indent" > </div><hr class="endfigure">
<dl class="compactenum"><dt class="compactenum">
1. </dt><dd
class="compactenum">Save - Save the current schematic
</dd><dt class="compactenum">
2. </dt><dd
class="compactenum">Library Editor - Create or edit components.
</dd><dt class="compactenum">
3. </dt><dd
class="compactenum">Library Browser - Browse through the various component libraries available
</dd><dt class="compactenum">
4. </dt><dd
class="compactenum">Navigate schematic hierarchy - Navigate among the root and sub-sheets in the
hierarchy
</dd><dt class="compactenum">
5. </dt><dd
class="compactenum">Print - Print the schematic
</dd><dt class="compactenum">
6. </dt><dd
class="compactenum">Generate netlist - Generate a netlist for PCB design or for simulation.
</dd><dt class="compactenum">
7. </dt><dd
class="compactenum">Annotate - Annotate the schematic
</dd><dt class="compactenum">
8. </dt><dd
class="compactenum">Check ERC - Do Electric Rules Check for the schematic
</dd><dt class="compactenum">
9. </dt><dd
class="compactenum">Create BOM - Create a Bill of Materials of the schematic</dd></dl>
<h4 class="subsectionHead"><span class="titlemark">5.1.3 </span> <a
id="x1-320005.1.3"></a>Toolbar on the right</h4>
<a
id="dx1-32001"></a>
<a
id="dx1-32002"></a>
<!--l. 104--><p class="noindent" >The toolbar on the right side of the schematic editor window has many important tools. Some
of them are marked in Fig. <a
href="#x1-320034">5.4<!--tex4ht:ref: eeschem3 --></a>. <hr class="figure"><div class="figure"
>
<a
id="x1-320034"></a>
<!--l. 108--><p class="noindent" ><img
src="figures/rightoolbar.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.4: </span><span
class="content">Toolbar on right with important tools marked</span></div><!--tex4ht:label?: x1-320034 -->
<!--l. 111--><p class="indent" > </div><hr class="endfigure">
<!--l. 112--><p class="indent" > Let us now look at each of these tools and their uses.
<dl class="compactenum"><dt class="compactenum">
1. </dt><dd
class="compactenum">Place a component - Load a component to the schematic. See Sec. <a
href="#x1-360005.2.1">5.2.1<!--tex4ht:ref: selplace --></a> for more
details.
</dd><dt class="compactenum">
2. </dt><dd
class="compactenum">Place a power port - Load a power port (Vcc, ground) to the schematic
</dd><dt class="compactenum">
3. </dt><dd
class="compactenum">Place wire - Draw wires to connect components in schematic
</dd><dt class="compactenum">
4. </dt><dd
class="compactenum">Place bus - Place a bus on the schematic
</dd><dt class="compactenum">
5. </dt><dd
class="compactenum">Place a no connect - Place a no connect flag, particularly useful in ICs
</dd><dt class="compactenum">
6. </dt><dd
class="compactenum">Place a local label - Place a label or node name which is local to the schematic
</dd><dt class="compactenum">
7. </dt><dd
class="compactenum">Place a global label - Place a global label (these are connected across all schematic
diagrams in the hierarchy)
</dd><dt class="compactenum">
8. </dt><dd
class="compactenum">Place a text or comment - Place a text or comment in the schematic</dd></dl>
<h4 class="subsectionHead"><span class="titlemark">5.1.4 </span> <a
id="x1-330005.1.4"></a>Toolbar on the left</h4>
<a
id="dx1-33001"></a>
<a
id="dx1-33002"></a>
<!--l. 126--><p class="noindent" >Some of the important tools in the toolbar on the left are discussed below. They are marked
in Fig. <a
href="#x1-330035">5.5<!--tex4ht:ref: eeschem4 --></a>. <hr class="figure"><div class="figure"
>
<a
id="x1-330035"></a>
<!--l. 130--><p class="noindent" ><img
src="figures/lefttoolbar.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.5: </span><span
class="content">Toolbar on left with important tools marked</span></div><!--tex4ht:label?: x1-330035 -->
<!--l. 133--><p class="indent" > </div><hr class="endfigure">
<dl class="compactenum"><dt class="compactenum">
1. </dt><dd
class="compactenum">Show/Hide grid - Show or Hide the grid in the schematic editor. Pressing the tool
again hides (shows) the grid if it was shown (hidden) earlier.
</dd><dt class="compactenum">
2. </dt><dd
class="compactenum">Show hidden pins - Show hidden pins of certain components, for example, power
pins of certain ICs.</dd></dl>
<h4 class="subsectionHead"><span class="titlemark">5.1.5 </span> <a
id="x1-340005.1.5"></a>Hotkeys</h4>
<!--l. 142--><p class="noindent" >A set of keyboard keys are associated with various operations in the schematic editor. These
keys save time and make it easy to switch from one operation to another. The list of hotkeys
can be viewed by going to Preferences in the top menu bar. Choose <span
class="cmti-10x-x-109">Hotkeys </span>and
select <span
class="cmti-10x-x-109">List current keys</span>. The hotkeys can also be edited by selecting the option
<span
class="cmti-10x-x-109">Edit Hotkeys</span>. Some frequently used hotkeys, along with their functions, are given
below:
<ul>
<li class="compactitem">F1 - Zoom in
</li>
<li class="compactitem">F2 - Zoom out
</li>
<li class="compactitem">Ctrl + Z - Undo
</li>
<li class="compactitem">Delete - Delete item
</li>
<li class="compactitem">M - Move item
</li>
<li class="compactitem">C - Copy item
</li>
<li class="compactitem">A - Add/place component
</li>
<li class="compactitem">P - Place power component
</li>
<li class="compactitem">R - Rotate item
</li>
<li class="compactitem">X - Mirror component about X axis
</li>
<li class="compactitem">Y - Mirror component about Y axis
</li>
<li class="compactitem">E - Edit schematic component
</li>
<li class="compactitem">W - Place wire
</li>
<li class="compactitem">T - Add text
</li>
<li class="compactitem">S - Add sheet</li></ul>
<!--l. 166--><p class="noindent" ><span
class="cmti-10x-x-109">Note: Both lower and upper-case keys will work as hotkeys</span>.
<!--l. 168--><p class="noindent" >
<h3 class="sectionHead"><span class="titlemark">5.2 </span> <a
id="x1-350005.2"></a>Schematic creation for simulation</h3>
<a
id="dx1-35001"></a>
<!--l. 170--><p class="noindent" >There are certain differences between the schematic created for simulation and that created
for PCB design. We need certain components like plots and current sources. For simulation
whereas these are not needed for PCB design. For PCB design, we would require connectors
(e.g. DB15 and 2 pin connector) for taking signals in and out of the PCB whereas
these have no meaning in simulation. This section covers schematic creation for
simulation.
<!--l. 177--><p class="indent" > The first step in the creation of circuit schematic is the selection and placement of
required components. The components are grouped under eSim-libraries as shown in Fig. <a
href="#x1-350026">5.6<!--tex4ht:ref: libraries --></a>.
<hr class="figure"><div class="figure"
>
<a
id="x1-350026"></a>
<!--l. 181--><p class="noindent" ><img
src="figures/libraries.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.6: </span><span
class="content">eSim-Components Libraries</span></div><!--tex4ht:label?: x1-350026 -->
<!--l. 184--><p class="indent" > </div><hr class="endfigure">
<h4 class="subsectionHead"><span class="titlemark">5.2.1 </span> <a
id="x1-360005.2.1"></a>Selection and placement of components</h4>
<a
id="dx1-36001"></a>
<!--l. 189--><p class="noindent" >We would need a resistor, a capacitor, a voltage source, ground terminal. To place a resistor
on the schematic editor window, select the <span
class="cmti-10x-x-109">Place a component </span>tool from the toolbar
on the right side and click anywhere on the schematic editor. This opens up the
component selection window. Resistor component can be found under <span
class="cmti-10x-x-109">eSim</span><span
class="cmti-10x-x-109">_Devices</span>
library. Fig. <a
href="#x1-360027">5.7<!--tex4ht:ref: resistor --></a> shows the selection of resistor component. Click on OK. A resistor
will be tied to the cursor. Place the resistor on the schematic editor by a single
click.
<!--l. 196--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-360027"></a>
<!--l. 198--><p class="noindent" ><img
src="figures/resistor.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.7: </span><span
class="content">Placing a resistor using the Place a Component tool</span></div><!--tex4ht:label?: x1-360027 -->
<!--l. 201--><p class="indent" > </div><hr class="endfigure">
<!--l. 202--><p class="indent" > To place the next component, i.e., capacitor, click again on the schematic editor.Similarly,
Capacitor component is found under <span
class="cmti-10x-x-109">eSim</span><span
class="cmti-10x-x-109">_Devices </span>library. Click on OK. Place the capacitor
on the schematic editor by a single click. Let us now place a sinusoidal voltage source. This is
required for performing transient analysis. To place it, click again on the schematic editor. On
the component selection window, choose the library <span
class="cmti-10x-x-109">eSim</span><span
class="cmti-10x-x-109">_source </span>by double clicking on it.
Select the component <span
class="cmtt-10x-x-109">SINE </span>and click on OK. Place the sine source on the schematic editor by
a single click.
<!--l. 211--><p class="indent" > Place the component by clicking on the schematic editor. Similarly place <span
class="cmtt-10x-x-109">gnd</span>, a ground
terminal and <span
class="cmtt-10x-x-109">power</span><span
class="cmtt-10x-x-109">_flag </span>under <span
class="cmtt-10x-x-109">power </span>library. Once all the components are placed, the
schematic editor would look like the Fig. <a
href="#x1-360038">5.8<!--tex4ht:ref: afterplace --></a>. <hr class="figure"><div class="figure"
>
<a
id="x1-360038"></a>
<!--l. 216--><p class="noindent" ><img
src="figures/afterplace.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.8: </span><span
class="content">All RC circuit components placed</span></div><!--tex4ht:label?: x1-360038 -->
<!--l. 219--><p class="indent" > </div><hr class="endfigure">
<!--l. 220--><p class="indent" > Let us rotate the resistor to complete the circuit. To rotate the resistor, place the cursor
on the resistor and press the key <span
class="cmtt-10x-x-109">R</span>. Note that if the cursor is placed above the letter <span
class="cmtt-10x-x-109">R </span>(not
<span
class="cmtt-10x-x-109">R?</span>) on the resistor, it asks to clarify selection. Choose the option <span
class="cmti-10x-x-109">Component R</span>. This can be
avoided by placing the cursor slightly away from the letter R as shown in Fig. <a
href="#x1-360059">5.9<!--tex4ht:ref: rotate --></a>. This
applies to all components.<a
id="dx1-36004"></a> <hr class="figure"><div class="figure"
>
<a
id="x1-360059"></a>
<!--l. 228--><p class="noindent" ><img
src="figures/rotate.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.9: </span><span
class="content">Placing the cursor (cross mark) slightly away from the letter R</span></div><!--tex4ht:label?: x1-360059 -->
<!--l. 231--><p class="indent" > </div><hr class="endfigure">
<!--l. 232--><p class="indent" > If one wants to move a component, place the cursor on top of the component and press the
key <span
class="cmtt-10x-x-109">M</span>. The component will be tied to the cursor and can be moved in any direction.
<a
id="dx1-36006"></a>
<h4 class="subsectionHead"><span class="titlemark">5.2.2 </span> <a
id="x1-370005.2.2"></a>Wiring the circuit</h4>
<a
id="dx1-37001"></a>
<!--l. 238--><p class="noindent" >The next step is to wire the connections. Let us connect the resistor to the capacitor.
To do so, point the cursor to the terminal of resistor to be connected and press
the key <span
class="cmtt-10x-x-109">W</span>. It has now changed to the wiring mode. Move the cursor towards the
terminal of the capacitor and click on it. A wire is formed as shown in Fig. <a
href="#x1-37002r1">5.10a<!--tex4ht:ref: wire1 --></a>.
<hr class="figure"><div class="figure"
>
<a
id="x1-3700510"></a>
<a
id="x1-37002r1"></a>
<!--l. 248--><p class="noindent" > <img
src="figures/wire1.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">Initial</span>
<span
class="cmr-9">stages</span> <a
id="x1-37003r2"></a> <img
src="figures/wirefin.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">Wiring</span>
<span
class="cmr-9">done</span> <a
id="x1-37004r3"></a> <img
src="figures/schemfin.png" alt="PIC"
>
<span
class="cmr-9">(c)</span>
<span
class="cmr-9">Final</span>
<span
class="cmr-9">schematic</span>
<span
class="cmr-9">with</span>
<span
class="cmr-9">PWR</span><span
class="cmr-9">_FLAG</span>
<br /> <div class="caption"
><span class="id">Figure 5.10: </span><span
class="content">Various stages of wiring</span></div><!--tex4ht:label?: x1-3700510 -->
<!--l. 256--><p class="indent" > </div><hr class="endfigure">
<!--l. 257--><p class="indent" > Similarly connect the wires between all terminals and the final schematic would look like
Fig. <a
href="#x1-37003r2">5.10b<!--tex4ht:ref: wirefin --></a>.
<h4 class="subsectionHead"><span class="titlemark">5.2.3 </span> <a
id="x1-380005.2.3"></a>Assigning values to components</h4>
<a
id="dx1-38001"></a>
<!--l. 261--><p class="noindent" >We need to assign values to the components in our circuit i.e., resistor and capacitor. Note
that the sine voltage source has been placed for simulation. The specifications of sine source
will be given during simulation. To assign value to the resistor, place the cursor above the
letter <span
class="cmtt-10x-x-109">R </span>(not <span
class="cmtt-10x-x-109">R?</span>) and press the key <span
class="cmtt-10x-x-109">E</span>. Choose <span
class="cmti-10x-x-109">Field value</span>. Type <span
class="cmtt-10x-x-109">1k </span>in the <span
class="cmti-10x-x-109">Edit value field </span>box
as shown in Fig. <a
href="#x1-3800211">5.11<!--tex4ht:ref: field --></a>. 1k means 1<span
class="cmmi-10x-x-109">k</span>Ω. Similarly give the value <span
class="cmtt-10x-x-109">1u </span>for the capacitor. 1u means
1<span
class="cmmi-10x-x-109">μF</span>.
<!--l. 271--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-3800211"></a>
<!--l. 273--><p class="noindent" ><img
src="figures/field.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.11: </span><span
class="content">Editing value of resistor</span></div><!--tex4ht:label?: x1-3800211 -->
<!--l. 276--><p class="indent" > </div><hr class="endfigure">
<h4 class="subsectionHead"><span class="titlemark">5.2.4 </span> <a
id="x1-390005.2.4"></a>Annotation and ERC</h4>
<a
id="dx1-39001"></a>
<a
id="dx1-39002"></a>
<a
id="dx1-39003"></a>
<a
id="dx1-39004"></a>
<!--l. 280--><p class="noindent" >The next step is to annotate the schematic. Annotation gives unique references to the
components. To annotate the schematic, click on <span
class="cmti-10x-x-109">Annotate schematic </span>tool from the
top toolbar. Click on <span
class="cmtt-10x-x-109">annotation</span>, then click on <span
class="cmtt-10x-x-109">OK </span>and finally click on close as
shown in Fig. <a
href="#x1-3900813">5.13<!--tex4ht:ref: anno --></a>. The schematic is now annotated. The question marks next to
component references have been replaced by unique numbers. If there are more than
one instance of a component (say resistor), the annotation will be done as R1, R2,
etc.
<!--l. 289--><p class="indent" > Let us now do <span
class="cmtt-10x-x-109">ERC </span>or <span
class="cmtt-10x-x-109">Electric Rules Check</span>. To do so, click on <span
class="cmti-10x-x-109">Perform electric rules</span>
<span
class="cmti-10x-x-109">check </span>tool from the top toolbar. Click on <span
class="cmti-10x-x-109">Test Erc </span>button. The error as shown in Fig. <a
href="#x1-3900712">5.12<!--tex4ht:ref: erc --></a>
may be displayed. Click on close in the test erc<a
id="dx1-39005"></a> window. <a
id="dx1-39006"></a><hr class="figure"><div class="figure"
>
<a
id="x1-3900712"></a>
<!--l. 296--><p class="noindent" ><img
src="figures/erc2.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.12: </span><span
class="content">ERC error</span></div><!--tex4ht:label?: x1-3900712 -->
<!--l. 299--><p class="indent" > </div><hr class="endfigure">
<!--l. 300--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-3900813"></a>
<!--l. 302--><p class="noindent" ><img
src="figures/anno.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.13: </span><span
class="content">Steps in annotating a schematic: 1. First click on Annotation then 2. Click
on Ok then 3. Click on close</span></div><!--tex4ht:label?: x1-3900813 -->
<!--l. 305--><p class="indent" > </div><hr class="endfigure">
<!--l. 306--><p class="indent" > There will be a green arrow pointing to the source of error in the schematic. Here it points
to the ground terminal. This is shown in Fig. <a
href="#x1-3900914">5.14<!--tex4ht:ref: ercgnd --></a>. <hr class="figure"><div class="figure"
>
<a
id="x1-3900914"></a>
<!--l. 311--><p class="noindent" ><img
src="figures/ercgnd.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.14: </span><span
class="content">Green arrow pointing to Ground terminal indicating an ERC error</span></div><!--tex4ht:label?: x1-3900914 -->
<!--l. 314--><p class="indent" > </div><hr class="endfigure">
<!--l. 315--><p class="indent" > To correct this error, place a <span
class="cmtt-10x-x-109">PWR</span><span
class="cmtt-10x-x-109">_FLAG </span>from the Eeschema library <span
class="cmti-10x-x-109">power</span>. <a
id="dx1-39010"></a>Connect the
power flag to the ground terminal as shown in Fig. <a
href="#x1-37004r3">5.10c<!--tex4ht:ref: schemfin --></a>. One needs to place <span
class="cmtt-10x-x-109">PWR</span><span
class="cmtt-10x-x-109">_FLAG</span>
wherever the error shown in Fig. <a
href="#x1-3900712">5.12<!--tex4ht:ref: erc --></a> is obtained. Repeat the ERC. Now there are no errors.
With this we have created the schematic for simulation.
<h4 class="subsectionHead"><span class="titlemark">5.2.5 </span> <a
id="x1-400005.2.5"></a>Netlist generation</h4>
<a
id="dx1-40001"></a>
<!--l. 326--><p class="noindent" >To simulate the circuit that has been created in the previous section, we need to generate its
netlist. <span
class="cmtt-10x-x-109">Netlist </span>is a list of components in the schematic along with their connection
information. <a
id="dx1-40002"></a>To do so, click on the <span
class="cmti-10x-x-109">Generate netlist </span>tool from the top toolbar. Click on spice
from the window that opens up. Check the option <span
class="cmtt-10x-x-109">Default Format</span>. Then click on <span
class="cmti-10x-x-109">Generate</span>.
This is shown in Fig. <a
href="#x1-4000315">5.15<!--tex4ht:ref: chap5net --></a>. Save the netlist. This will be a <span
class="cmtt-10x-x-109">.cir </span>file. Do not change the
directory while saving. <hr class="figure"><div class="figure"
>
<a
id="x1-4000315"></a>
<!--l. 337--><p class="noindent" ><img
src="figures/netlist.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 5.15: </span><span
class="content">Steps in generating a Netlist for simulation: 1. Click on Spice then 2.
Check the option <span
class="cmtt-10x-x-109">Default Format </span>then 3. Click on Generate </span></div><!--tex4ht:label?: x1-4000315 -->
<!--l. 340--><p class="indent" > </div><hr class="endfigure">
<!--l. 341--><p class="indent" > Now the netlist is ready to be simulated. Refer to <span class="cite"> [<a
href="#Xkicad">15</a>]</span> or <span class="cite"> [<a
href="#Xkicad2">16</a>]</span> to know more about
Eeschema.
<h2 class="chapterHead"><span class="titlemark">Chapter 6</span><br /><a
id="x1-410006"></a>PCB Design</h2> Printed Circuit Board (PCB) <a
id="dx1-41001"></a>design is an important step in
electronic system design. Every component of the circuit needs to be placed and connections
routed to minimise delay and area. Each component has an associated footprint. Footprint
refers to the physical layout of a component that is required to mount it on the PCB.<a
id="dx1-41002"></a> <a
id="dx1-41003"></a>PCB
design involves associating footprints to all components, placing them appropriately to
minimise wire length and area, connecting the footprints using tracks/vias and finally
extracting the required files needed for printing the PCB. Let us see the steps to design PCB
using eSim.
<h3 class="sectionHead"><span class="titlemark">6.1 </span> <a
id="x1-420006.1"></a>Schematic creation for PCB design</h3>
<!--l. 16--><p class="noindent" >In Chapter <a
href="#x1-610009">9<!--tex4ht:ref: chap5 --></a>, we will see the differences between schematic for simulation and schematic for
PCB design. Let us design the PCB for a RC circuit. A resistor, capacitor, ground, power flag
and a connector are required. Connectors are used to take signals in and out of the
PCB.
<!--l. 22--><p class="indent" > Create the circuit schematic as shown in Fig. <a
href="#x1-420011">6.1<!--tex4ht:ref: pcbschfin --></a>. The two pin connector (<span
class="cmti-10x-x-109">CONN</span><span
class="cmti-10x-x-109">_2</span>) can
be placed from the Eeschema library <span
class="cmti-10x-x-109">conn</span>. Do the annotation and test for ERC. Refer to
Chapter <a
href="#x1-610009">9<!--tex4ht:ref: chap5 --></a> to know more about basic steps in schematic creation.
<!--l. 28--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-420011"></a>
<!--l. 30--><p class="noindent" ><img
src="figures/pcbschfin.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.1: </span><span
class="content">Final circuit schematic for RC low pass circuit</span></div><!--tex4ht:label?: x1-420011 -->
<!--l. 33--><p class="indent" > </div><hr class="endfigure">
<h4 class="subsectionHead"><span class="titlemark">6.1.1 </span> <a
id="x1-430006.1.1"></a>Netlist generation for PCB</h4>
<a
id="dx1-43001"></a>
<a
id="dx1-43002"></a>
<!--l. 38--><p class="noindent" >The netlist for PCB is different from that for simulation. To generate netlist for PCB, click on
the <span
class="cmti-10x-x-109">Generate netlist </span>tool from the top toolbar in Schematic editor. In the Netlist window,
under the tab <span
class="cmti-10x-x-109">Pcbnew</span>, <a
id="dx1-43003"></a>click on the button <span
class="cmti-10x-x-109">Netlist</span>. This is shown in Fig. <a
href="#x1-430042">6.2<!--tex4ht:ref: netlistpcb --></a>. Click on
<span
class="cmti-10x-x-109">Save </span>in the Save netlist file dialog box that opens up. Do not change the directory
or the name of the netlist file. Save the schematic and close the schematic editor.
<hr class="figure"><div class="figure"
>
<a
id="x1-430042"></a>
<!--l. 48--><p class="noindent" ><img
src="figures/netlistpcb.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.2: </span><span
class="content">Netlist generation for PCB</span></div><!--tex4ht:label?: x1-430042 -->
<!--l. 51--><p class="indent" > </div><hr class="endfigure">
<!--l. 52--><p class="indent" > <span
class="cmti-10x-x-109">Note that the netlist for PCB has an extension </span><span
class="cmtt-10x-x-109">.net</span><span
class="cmti-10x-x-109">. The netlist created for simulation</span>
<span
class="cmti-10x-x-109">has an extension </span><span
class="cmtt-10x-x-109">.cir</span>.
<h4 class="subsectionHead"><span class="titlemark">6.1.2 </span> <a
id="x1-440006.1.2"></a>Mapping of components using Footprint Editor</h4>
<a
id="dx1-44001"></a>
<a
id="dx1-44002"></a>
<a
id="dx1-44003"></a>
<!--l. 59--><p class="noindent" >Once the netlist for PCB is created, one needs to map each component in the netlist to a
footprint. The tool <span
class="cmti-10x-x-109">Footprint Editor </span>is used for this. eSim uses <span
class="cmtt-10x-x-109">CvPcb </span>as its footprint editor.
<span
class="cmtt-10x-x-109">CvPcb </span>is the footprint editor tool in KiCad. <a
id="dx1-44004"></a>
<!--l. 64--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">6.1.3 </span> <a
id="x1-450006.1.3"></a>Familiarising the Footprint Editor tool</h4>
<a
id="dx1-45001"></a>
<!--l. 67--><p class="noindent" >If one opens the <span
class="cmti-10x-x-109">Footprint Editor </span>after creating the <span
class="cmtt-10x-x-109">.net </span>netlist file, the Footprint editor as
shown in Fig. <a
href="#x1-450023">6.3<!--tex4ht:ref: fe --></a> will be obtained. The menu bar and toolbars and the panes are marked in
this figure. The menu bar will be available in the top left corner. The left pane has a list of
components in the netlist file and the right pane has a list of available footprints for each
component. <hr class="figure"><div class="figure"
>
<a
id="x1-450023"></a>
<!--l. 75--><p class="noindent" ><img
src="figures/fe.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.3: </span><span
class="content">Footprint editor with the menu bar, toolbar, left pane and right pane
marked</span></div><!--tex4ht:label?: x1-450023 -->
<!--l. 78--><p class="indent" > </div><hr class="endfigure">
<!--l. 79--><p class="indent" > <span
class="cmti-10x-x-109">Note that if the Footprint Editor is opened before creating a ‘.net’ file, then the left and</span>
<span
class="cmti-10x-x-109">right panes will be empty</span>.
<h5 class="subsubsectionHead"><a
id="x1-460006.1.3"></a>Toolbar</h5>
<!--l. 82--><p class="noindent" >Some of the important tools in the toolbar are shown in Fig. <a
href="#x1-460014">6.4<!--tex4ht:ref: tb_fe --></a>. They are explained below:
<hr class="figure"><div class="figure"
>
<a
id="x1-460014"></a>
<!--l. 86--><p class="noindent" ><img
src="figures/tb_fe.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.4: </span><span
class="content">Some important tools in the toolbar</span></div><!--tex4ht:label?: x1-460014 -->
<!--l. 89--><p class="indent" > </div><hr class="endfigure">
<dl class="compactenum"><dt class="compactenum">
1. </dt><dd
class="compactenum">Save netlist and footprint files - Save the netlist and the footprints that are
associated with it.
</dd><dt class="compactenum">
2. </dt><dd
class="compactenum">View selected footprint - View the selected footprint in 2D. See Sec. <a
href="#x1-470006.1.4">6.1.4<!--tex4ht:ref: viewfp --></a> for more
details.
</dd><dt class="compactenum">
3. </dt><dd
class="compactenum">Automatic footprint association - Perform footprint association for each
component automatically. Footprints will be selected from the list of footprints
available.
</dd><dt class="compactenum">
4. </dt><dd
class="compactenum">Delete all associations - Delete all the footprint associations made
</dd><dt class="compactenum">
5. </dt><dd
class="compactenum">Display filtered footprint list - Display a filtered list of footprints suitable to the
selected component
</dd><dt class="compactenum">
6. </dt><dd
class="compactenum">Display full footprint list - Display the list of all footprints available (without
filtering)</dd></dl>
<h4 class="subsectionHead"><span class="titlemark">6.1.4 </span> <a
id="x1-470006.1.4"></a>Viewing footprints in 2D and 3D</h4>
<a
id="dx1-47001"></a>
<a
id="dx1-47002"></a>
<!--l. 110--><p class="noindent" >To view a footprint in 2D, select it from the right pane and click on <span
class="cmti-10x-x-109">View selected footprint</span>
from the menu bar. Let us view the footprint for <span
class="cmtt-10x-x-109">SM1210</span>. Choose SM1210 from
the right pane as shown in Fig. <a
href="#x1-470035">6.5<!--tex4ht:ref: sm --></a>. On clicking the <span
class="cmti-10x-x-109">View selected footprint </span>tool,
the <span
class="cmtt-10x-x-109">Footprint </span>window with the view in 2D will be displayed. Click on the <span
class="cmti-10x-x-109">3D</span>
tool in the <span
class="cmtt-10x-x-109">Footprint </span>window, as shown in Fig. <a
href="#x1-470046">6.6<!--tex4ht:ref: 3d --></a>. A top view of the selected
footprint in 3D is obtained. Click on the footprint and rotate it using mouse to get 3D
views from various angles. One such side view of the footprint in 3D is shown in
Fig. <a
href="#x1-470057">6.7<!--tex4ht:ref: 3dv --></a>.
<!--l. 121--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-470035"></a>
<!--l. 123--><p class="noindent" ><img
src="figures/sm.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.5: </span><span
class="content">Viewing footprint for SM1210: 1. Choose the footprint SM1210 from the
right pane, 2. Click on <span
class="cmti-10x-x-109">View selected footprint</span></span></div><!--tex4ht:label?: x1-470035 -->
<!--l. 127--><p class="indent" > </div><hr class="endfigure">
<!--l. 128--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-470046"></a>
<!--l. 130--><p class="noindent" ><img
src="figures/3d.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.6: </span><span
class="content">Footprint view in 2D. Click on <span
class="cmti-10x-x-109">3D </span>to get 3D view</span></div><!--tex4ht:label?: x1-470046 -->
<!--l. 133--><p class="indent" > </div><hr class="endfigure">
<!--l. 134--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-470057"></a>
<!--l. 136--><p class="noindent" ><img
src="figures/3dv.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.7: </span><span
class="content">Side view of the footprint in 3D</span></div><!--tex4ht:label?: x1-470057 -->
<!--l. 139--><p class="indent" > </div><hr class="endfigure">
<h4 class="subsectionHead"><span class="titlemark">6.1.5 </span> <a
id="x1-480006.1.5"></a>Mapping of components in the RC circuit</h4>
<!--l. 142--><p class="noindent" >Click on <span
class="cmtt-10x-x-109">C1 </span>from the left pane. Choose the footprint <span
class="cmti-10x-x-109">C1 </span>from the right pane by double
clicking on it. Click on connector <span
class="cmtt-10x-x-109">P1 </span>from the left pane. Choose the footprint <span
class="cmti-10x-x-109">SIL-2 </span>from the
right pane by double clicking on it. Similarly choose the footprint <span
class="cmti-10x-x-109">R3 </span>for the resistor <span
class="cmtt-10x-x-109">R1</span>. The
footprint mapping is shown in Fig. <a
href="#x1-480018">6.8<!--tex4ht:ref: map --></a>. Save the footprint association by clicking on the <span
class="cmti-10x-x-109">Save</span>
<span
class="cmti-10x-x-109">netlist and footprint files </span>tool from the <span
class="cmtt-10x-x-109">CvPcb </span>toolbar. The <span
class="cmtt-10x-x-109">Save Net and component List</span>
window appears. Browse to the directory where the schematic file for this project is saved and
click on <span
class="cmti-10x-x-109">Save</span>. The netlist gets saved and the <span
class="cmti-10x-x-109">Footprint Editor </span>window closes automatically.
<hr class="figure"><div class="figure"
>
<a
id="x1-480018"></a>
<!--l. 155--><p class="noindent" ><img
src="figures/map.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.8: </span><span
class="content">Footprint mapping done</span></div><!--tex4ht:label?: x1-480018 -->
<!--l. 158--><p class="indent" > </div><hr class="endfigure">
<!--l. 159--><p class="indent" > <span
class="cmti-10x-x-109">Note that one needs to browse to the directory where the schematic file is saved and save</span>
<span
class="cmti-10x-x-109">the ‘.net’ file in the same directory</span>.
<h3 class="sectionHead"><span class="titlemark">6.2 </span> <a
id="x1-490006.2"></a>Creation of PCB layout</h3>
<a
id="dx1-49001"></a>
<a
id="dx1-49002"></a>
<!--l. 164--><p class="noindent" >The next step is to place the footprints and lay tracks between them to get the layout. This is
done using the <span
class="cmti-10x-x-109">Layout Editor </span>tool. eSim uses <span
class="cmtt-10x-x-109">Pcbnew</span>, the layout creation tool in KiCad, as its
layout editor.
<!--l. 169--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">6.2.1 </span> <a
id="x1-500006.2.1"></a>Familiarizing the Layout Editor tool</h4>
<a
id="dx1-50001"></a>
<!--l. 172--><p class="noindent" >The layout editor with the various menu bar and toolbars is shown in Fig. <a
href="#x1-500029">6.9<!--tex4ht:ref: pcbnew --></a>.
<hr class="figure"><div class="figure"
>
<a
id="x1-500029"></a>
<!--l. 176--><p class="noindent" ><img
src="figures/pcbnew.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.9: </span><span
class="content">Layout editor with menu bar, toolbars and layer options marked</span></div><!--tex4ht:label?: x1-500029 -->
<!--l. 179--><p class="indent" > </div><hr class="endfigure">
<!--l. 180--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-5000310"></a>
<!--l. 182--><p class="noindent" ><img
src="figures/toptble.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.10: </span><span
class="content">Top toolbar with important tools marked</span></div><!--tex4ht:label?: x1-5000310 -->
<!--l. 185--><p class="indent" > </div><hr class="endfigure">
<h5 class="subsubsectionHead"><a
id="x1-510006.2.1"></a>Top toolbar</h5>
<!--l. 188--><p class="noindent" >Some of the important menu options in the top menu bar are shown in Fig. <a
href="#x1-5000310">6.10<!--tex4ht:ref: toptble --></a>. They are
explained below:
<dl class="compactenum"><dt class="compactenum">
1. </dt><dd
class="compactenum">Save board - Save the printed circuit board
</dd><dt class="compactenum">
2. </dt><dd
class="compactenum">Module editor - Open module editor to edit footprint modules or libraries
</dd><dt class="compactenum">
3. </dt><dd
class="compactenum">Read netlist - Import the netlist whose layout needs to be created.
</dd><dt class="compactenum">
4. </dt><dd
class="compactenum">Perform design rules check - Check for design rules, unconnected nets, etc., in the
layout.
</dd><dt class="compactenum">
5. </dt><dd
class="compactenum">Select working layer - Selection of working layer
</dd><dt class="compactenum">
6. </dt><dd
class="compactenum">Show active layer selections and select layer pair for route and place - Select layer
in top and bottom layers. It also shows the currently active layer selections.
</dd><dt class="compactenum">
7. </dt><dd
class="compactenum">Mode footprint: Manual/automatic move and place - Move and place modules</dd></dl>
<!--l. 206--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">6.2.2 </span> <a
id="x1-520006.2.2"></a>Hotkeys</h4>
<a
id="dx1-52001"></a>
<!--l. 208--><p class="noindent" >A list of hotkeys are given below:
<dl class="compactenum"><dt class="compactenum">
1. </dt><dd
class="compactenum">F1 - Zoom in
</dd><dt class="compactenum">
2. </dt><dd
class="compactenum">F2 - Zoom out
</dd><dt class="compactenum">
3. </dt><dd
class="compactenum">Delete - Delete Track or Footprint
</dd><dt class="compactenum">
4. </dt><dd
class="compactenum">X - Add new track
</dd><dt class="compactenum">
5. </dt><dd
class="compactenum">V - Add Via
</dd><dt class="compactenum">
6. </dt><dd
class="compactenum">M - Move Item
</dd><dt class="compactenum">
7. </dt><dd
class="compactenum">F - Flip Footprint
</dd><dt class="compactenum">
8. </dt><dd
class="compactenum">R - Rotate Item
</dd><dt class="compactenum">
9. </dt><dd
class="compactenum">G - Drag Footprint
</dd><dt class="compactenum">
10. </dt><dd
class="compactenum">Ctrl+Z - Undo
</dd><dt class="compactenum">
11. </dt><dd
class="compactenum">E - Edit Item</dd></dl>
<!--l. 222--><p class="noindent" >The list can be viewed by selecting <span
class="cmti-10x-x-109">Preferences </span>from the top menu bar and choosing <span
class="cmti-10x-x-109">List Current</span>
<span
class="cmti-10x-x-109">Keys </span>from the option <span
class="cmti-10x-x-109">Hotkeys</span>.
<!--l. 226--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">6.2.3 </span> <a
id="x1-530006.2.3"></a>PCB design example using RC circuit</h4>
<a
id="dx1-53001"></a>
<!--l. 227--><p class="noindent" >Click on <span
class="cmti-10x-x-109">Layout Editor </span>from the eSim toolbar. Click on <span
class="cmti-10x-x-109">Read Netlist </span>tool from the top
toolbar. Click on <span
class="cmti-10x-x-109">Browse Netlist files </span>on the Netlist window that opens up. Select the <span
class="cmtt-10x-x-109">.net </span>file
that was modified after assigning footprints. Click on <span
class="cmti-10x-x-109">Open</span>. Now Click on <span
class="cmti-10x-x-109">Read Current</span>
<span
class="cmti-10x-x-109">Netlist </span>on the Netlist window. The message area in the Netlist window says that
the RC_pcb.net has been read. The sequence of operations is shown in Fig. <a
href="#x1-5300411">6.11<!--tex4ht:ref: brnet --></a>.
<a
id="dx1-53002"></a><a
id="dx1-53003"></a><hr class="figure"><div class="figure"
>
<a
id="x1-5300411"></a>
<!--l. 238--><p class="noindent" ><img
src="figures/rcpcb.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.11: </span><span
class="content">Importing netlist file to layout editor: 1. Browse netlist Files, 2. Choose
the RC_pcb.net file, 3. Read Netlist file, 4. Close</span></div><!--tex4ht:label?: x1-5300411 -->
<!--l. 242--><p class="indent" > </div><hr class="endfigure">
<!--l. 243--><p class="indent" > The footprint modules will now be imported to the top left hand corner of the layout
editor window. This is shown in Fig. <a
href="#x1-5300512">6.12<!--tex4ht:ref: netlisttop --></a>. <hr class="figure"><div class="figure"
>
<a
id="x1-5300512"></a>
<!--l. 247--><p class="noindent" ><img
src="figures/netlisttop.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.12: </span><span
class="content">Footprint modules imported to top left corner of layout editor window</span></div><!--tex4ht:label?: x1-5300512 -->
<!--l. 250--><p class="indent" > </div><hr class="endfigure">
<!--l. 251--><p class="indent" > Zoom in to the top left corner by pressing the key <span
class="cmtt-10x-x-109">F1 </span>or using the scroll button of the
mouse. The zoomed in version of the imported netlist is shown in Fig. <a
href="#x1-5300613">6.13<!--tex4ht:ref: zoom --></a>.
<!--l. 255--><p class="indent" > Let us now place this in the center of the layout editor window. <hr class="figure"><div class="figure"
>
<a
id="x1-5300613"></a>
<!--l. 259--><p class="noindent" ><img
src="figures/zoom.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.13: </span><span
class="content">Zoomed in version of the imported netlist</span></div><!--tex4ht:label?: x1-5300613 -->
<!--l. 262--><p class="indent" > </div><hr class="endfigure">
<!--l. 263--><p class="indent" > Click on <span
class="cmti-10x-x-109">Mode footprint: Manual/automatic move and place </span>tool from the top toolbar.
Place the cursor near the center of the layout editor window. Right click and choose <span
class="cmti-10x-x-109">Glob</span>
<span
class="cmti-10x-x-109">move and place</span>. Choose <span
class="cmti-10x-x-109">move all modules</span>. The sequence of operations is shown in Fig. <a
href="#x1-5300714">6.14<!--tex4ht:ref: movep --></a>.
Click on <span
class="cmti-10x-x-109">Yes </span>on the confirmation window to move the modules. Zoom in using the F1 key.
The current placement of components after zooming in is shown in Fig. <a
href="#x1-53008r1">6.15a<!--tex4ht:ref: curplace --></a>.
<hr class="figure"><div class="figure"
>
<a
id="x1-5300714"></a>
<!--l. 272--><p class="noindent" ><img
src="figures/movep.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.14: </span><span
class="content">Moving and placing modules to the center of layout editor. 1. Click on
<span
class="cmti-10x-x-109">Mode footprint: Manual/automatic move and place</span>, 2. Place cursor at center of layout
editor and right click on it 3. Choose <span
class="cmti-10x-x-109">Glob Move and Place </span>and then choose <span
class="cmti-10x-x-109">Move All</span>
<span
class="cmti-10x-x-109">Modules.</span></span></div><!--tex4ht:label?: x1-5300714 -->
<!--l. 279--><p class="indent" > </div><hr class="endfigure">
<!--l. 286--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-5301015"></a>
<a
id="x1-53008r1"></a>
<!--l. 290--><p class="noindent" > <img
src="figures/curplace.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">Zoomed</span>
<span
class="cmr-9">in</span>
<span
class="cmr-9">version</span>
<span
class="cmr-9">of the</span>
<span
class="cmr-9">current</span>
<span
class="cmr-9">placement</span>
<span
class="cmr-9">after</span>
<span
class="cmr-9">moving</span>
<span
class="cmr-9">modules</span>
<span
class="cmr-9">to the</span>
<span
class="cmr-9">center</span>
<span
class="cmr-9">of the</span>
<span
class="cmr-9">layout</span>
<span
class="cmr-9">editor</span> <a
id="x1-53009r2"></a> <img
src="figures/fplace.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">Final</span>
<span
class="cmr-9">placement</span>
<span
class="cmr-9">of</span>
<span
class="cmr-9">footprints</span>
<span
class="cmr-9">after</span>
<span
class="cmr-9">rotating</span>
<span
class="cmr-9">and</span>
<span
class="cmr-9">moving</span>
<span
class="cmr-9">P1</span>
<br /> <div class="caption"
><span class="id">Figure 6.15: </span><span
class="content">Different stages of placement of modules on PCB</span></div><!--tex4ht:label?: x1-5301015 -->
<!--l. 295--><p class="indent" > </div><hr class="endfigure">
<!--l. 296--><p class="indent" > We need to arrange the modules properly to lay tracks. Rotate the connector P1 by
placing the cursor on top of P1 and pressing R. Move it by placing the cursor on top of it and
pressing M. The final placement is shown in Fig. <a
href="#x1-53009r2">6.15b<!--tex4ht:ref: fplace --></a>. <a
id="dx1-53011"></a>
<!--l. 302--><p class="indent" > Let us now lay the tracks. Let us first change the track width. Click on <span
class="cmti-10x-x-109">Design rules </span>from
the top menu bar. Click on <span
class="cmti-10x-x-109">Design rules</span>. This is shown in Fig. <a
href="#x1-5301416">6.16<!--tex4ht:ref: drules --></a>. The <span
class="cmti-10x-x-109">Design Rules Editor</span>
window opens up. Here one can edit the various design rules. Double click on the track width
field to edit it. Type 0.8 and press <span
class="cmtt-10x-x-109">Enter</span>. Click on OK. Fig. <a
href="#x1-5301517">6.17<!--tex4ht:ref: druleedit --></a> shows the sequence of
operations. <a
id="dx1-53012"></a><a
id="dx1-53013"></a> <hr class="figure"><div class="figure"
>
<a
id="x1-5301416"></a>
<!--l. 312--><p class="noindent" ><img
src="figures/drules.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.16: </span><span
class="content">Choose <span
class="cmti-10x-x-109">Design Rules </span>from the top menu bar and <span
class="cmti-10x-x-109">Design Rules </span>again</span></div><!--tex4ht:label?: x1-5301416 -->
<!--l. 316--><p class="indent" > </div><hr class="endfigure">
<!--l. 317--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-5301517"></a>
<!--l. 319--><p class="noindent" ><img
src="figures/druleedit.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.17: </span><span
class="content">Changing the track width: 1. Double click on <span
class="cmti-10x-x-109">Track Width </span>field and type
0.8, 2. Click on <span
class="cmti-10x-x-109">OK</span></span></div><!--tex4ht:label?: x1-5301517 -->
<!--l. 323--><p class="indent" > </div><hr class="endfigure">
<!--l. 325--><p class="indent" > Click on <span
class="cmti-10x-x-109">Back </span>from the <span
class="cmti-10x-x-109">Layer </span>options as shown in Fig. <a
href="#x1-5301718">6.18<!--tex4ht:ref: layer --></a>. <a
id="dx1-53016"></a><hr class="figure"><div class="figure"
>
<a
id="x1-5301718"></a>
<!--l. 329--><p class="noindent" ><img
src="figures/layer.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.18: </span><span
class="content">Choosing the copper layer <span
class="cmti-10x-x-109">Back</span></span></div><!--tex4ht:label?: x1-5301718 -->
<!--l. 332--><p class="indent" > </div><hr class="endfigure">
<!--l. 333--><p class="indent" > Let us now start laying the tracks. Place the cursor above the left terminal of R1
in the layout editor window. Press the key <span
class="cmtt-10x-x-109">x</span>. Move the cursor down and double
click on the left terminal of C1. A track is formed. This is shown in Fig. <a
href="#x1-53018r1">6.19a<!--tex4ht:ref: track1 --></a>.
<hr class="figure"><div class="figure"
>
<a
id="x1-5302119"></a>
<a
id="x1-53018r1"></a>
<!--l. 341--><p class="noindent" > <img
src="figures/track1.png" alt="PIC"
>
<span
class="cmr-9">(a) A</span>
<span
class="cmr-9">track</span>
<span
class="cmr-9">formed</span>
<span
class="cmr-9">between</span>
<span
class="cmr-9">resistor</span>
<span
class="cmr-9">and</span>
<span
class="cmr-9">capacitor</span> <a
id="x1-53019r2"></a> <img
src="figures/track2.png" alt="PIC"
>
<span
class="cmr-9">(b) A</span>
<span
class="cmr-9">track</span>
<span
class="cmr-9">formed</span>
<span
class="cmr-9">between</span>
<span
class="cmr-9">capacitor</span>
<span
class="cmr-9">and</span>
<span
class="cmr-9">connector</span> <a
id="x1-53020r3"></a> <img
src="figures/track3.png" alt="PIC"
>
<span
class="cmr-9">(c) A</span>
<span
class="cmr-9">track</span>
<span
class="cmr-9">formed</span>
<span
class="cmr-9">between</span>
<span
class="cmr-9">connector</span>
<span
class="cmr-9">and</span>
<span
class="cmr-9">resistor</span>
<br /> <div class="caption"
><span class="id">Figure 6.19: </span><span
class="content">Different stages of laying tracks during PCB design</span></div><!--tex4ht:label?: x1-5302119 -->
<!--l. 349--><p class="indent" > </div><hr class="endfigure">
<!--l. 350--><p class="indent" > Similarly lay the track between capacitor C1 and connector P1 as shown in
Fig. <a
href="#x1-53019r2">6.19b<!--tex4ht:ref: track2 --></a>. The last track needs to be laid at an angle. To do so, place the cursor
above the second terminal of R1. Press the key x and move the cursor diagonally
down. Double click on the other terminal of the connector. The track will be laid
as shown in Fig. <a
href="#x1-53020r3">6.19c<!--tex4ht:ref: track3 --></a>. All tracks are now laid. The next step is to create PCB
edges.
<!--l. 358--><p class="indent" > Choose <span
class="cmti-10x-x-109">PCB</span><span
class="cmti-10x-x-109">_edges </span>from the <span
class="cmti-10x-x-109">Layer </span>options to add edges. Click on <span
class="cmti-10x-x-109">Add graphic line or</span>
<span
class="cmti-10x-x-109">polygon </span>from the toolbar on the left. Fig. <a
href="#x1-5302320">6.20<!--tex4ht:ref: pcbedges --></a> shows the sequence of operations. Let us now
start drawing edges for PCB. <a
id="dx1-53022"></a><hr class="figure"><div class="figure"
>
<a
id="x1-5302320"></a>
<!--l. 365--><p class="noindent" ><img
src="figures/pcbedges.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.20: </span><span
class="content">Creating PCB edges: 1. Choose <span
class="cmti-10x-x-109">PCB</span><span
class="cmti-10x-x-109">_Edges </span>from <span
class="cmti-10x-x-109">Layer </span>options 2. Choose
<span
class="cmti-10x-x-109">Add graphic line or polygon </span>from left toolbar</span></div><!--tex4ht:label?: x1-5302320 -->
<!--l. 370--><p class="indent" > </div><hr class="endfigure">
<!--l. 371--><p class="indent" > Click to the left of the layout. Move cursor horizontally to the right. Click once to change
orientation. Move cursor vertically down. Draw the edges as shown in Fig. <a
href="#x1-5302421">6.21<!--tex4ht:ref: pcbed --></a>. Double click
to finish drawing the edges. <hr class="figure"><div class="figure"
>
<a
id="x1-5302421"></a>
<!--l. 377--><p class="noindent" ><img
src="figures/pcbed.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.21: </span><span
class="content">PCB edges drawn</span></div><!--tex4ht:label?: x1-5302421 -->
<!--l. 380--><p class="indent" > </div><hr class="endfigure">
<!--l. 382--><p class="indent" > Click on <span
class="cmti-10x-x-109">Perform design rules check </span>from the top toolbar to check for design rules. The
<span
class="cmti-10x-x-109">DRC Control </span>window opens up. Click on <span
class="cmti-10x-x-109">Start DRC</span>. There are no errors under the <span
class="cmtt-10x-x-109">Error</span>
<span
class="cmtt-10x-x-109">messages </span>tab. Click on <span
class="cmti-10x-x-109">OK </span>to close DRC control window. Fig. <a
href="#x1-5302622">6.22<!--tex4ht:ref: drc --></a> shows the sequence of
operations. <a
id="dx1-53025"></a><hr class="figure"><div class="figure"
>
<a
id="x1-5302622"></a>
<!--l. 390--><p class="noindent" ><img
src="figures/drc.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.22: </span><span
class="content">Performing design rules check: 1. Click on <span
class="cmti-10x-x-109">Start DRC</span>, 2. Click on <span
class="cmti-10x-x-109">Ok</span></span></div><!--tex4ht:label?: x1-5302622 -->
<!--l. 394--><p class="indent" > </div><hr class="endfigure">
<!--l. 395--><p class="indent" > Click on <span
class="cmti-10x-x-109">Save board </span>on the top toolbar.
<!--l. 397--><p class="indent" > To generate Gerber files, click on <span
class="cmti-10x-x-109">File </span>from the top menu bar. Click on <span
class="cmti-10x-x-109">Plot</span>. This is shown
in Fig. <a
href="#x1-5302823">6.23<!--tex4ht:ref: plot --></a>. The plot window opens up. One can choose which layers to plot by
selecting/deselecting them from the <span
class="cmtt-10x-x-109">Layers </span>pane on the left side. One can also choose the
format used to plot them. Choose <span
class="cmti-10x-x-109">Gerber</span>. The output directory of the plots created
can also be chosen. By default, it is the project directory. Some more options can
be chosen in this window. Click on <span
class="cmti-10x-x-109">Plot</span>. The message window shows the location
in which the Gerber files are created. Click on <span
class="cmti-10x-x-109">Close</span>. This is shown in Fig. <a
href="#x1-5302924">6.24<!--tex4ht:ref: plot2 --></a>.
<a
id="dx1-53027"></a><hr class="figure"><div class="figure"
>
<a
id="x1-5302823"></a>
<!--l. 410--><p class="noindent" ><img
src="figures/plot.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.23: </span><span
class="content">Choosing <span
class="cmti-10x-x-109">Plot </span>from the <span
class="cmti-10x-x-109">File </span>menu</span></div><!--tex4ht:label?: x1-5302823 -->
<!--l. 413--><p class="indent" > </div><hr class="endfigure">
<!--l. 414--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-5302924"></a>
<!--l. 416--><p class="noindent" ><img
src="figures/plot2.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 6.24: </span><span
class="content">Creating Gerber files: 1. Choose <span
class="cmti-10x-x-109">Gerber </span>as the plot format, 2. Click on
<span
class="cmti-10x-x-109">Plot</span>. Message window shows location in which Gerber files are created, 3. Click on <span
class="cmti-10x-x-109">Close</span></span></div><!--tex4ht:label?: x1-5302924 -->
<!--l. 421--><p class="indent" > </div><hr class="endfigure">
<!--l. 422--><p class="indent" > The PCB design of RC circuit is now complete. To know more about Pcbnew, refer to
<span class="cite"> [<a
href="#Xkicad">15</a>]</span> or <span class="cite"> [<a
href="#Xkicad2">16</a>]</span>.
<h2 class="chapterHead"><span class="titlemark">Chapter 7</span><br /><a
id="x1-540007"></a>Model Editor</h2>
<!--l. 4--><p class="noindent" >Spice based simulators include a feature which allows accurate modeling of semiconductor
devices such as diodes, transistors etc. eSim Model Editor provides a facility to define a new
model for devices such as <span
class="cmti-10x-x-109">diodes, MOSFET, BJT, JFET, IGBT, Magnetic core </span>etc. Model
Editor in eSim lets the user enter the values of parameters depending on the type of
device for which a model is required. The parameter values can be obtained from the
data-sheet of the device. A newly created model can be exported to the model library
and one can import it for different projects, whenever required. Model Editor also
provides a facility to edit existing models. The GUI of the model editor is as shown in
Fig. <a
href="#x1-540011">7.1<!--tex4ht:ref: modeleditor --></a>
<!--l. 15--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-540011"></a>
<!--l. 17--><p class="noindent" ><img
src="figures/modeleditor_new.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 7.1: </span><span
class="content">Model Editor</span></div><!--tex4ht:label?: x1-540011 -->
<!--l. 20--><p class="indent" > </div><hr class="endfigure">
<h3 class="sectionHead"><span class="titlemark">7.1 </span> <a
id="x1-550007.1"></a>Creating New Model Library </h3>
<!--l. 24--><p class="noindent" >eSim lets us create new model libraries based on the template model libraries. On selecting
<span
class="cmtt-10x-x-109">New </span>button the window is popped as shown in Fig. <a
href="#x1-550012">7.2<!--tex4ht:ref: modeleditor_new --></a>. The name has to be unique otherwise
the error message appears on the window.
<!--l. 27--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-550012"></a>
<!--l. 29--><p class="noindent" ><img
src="figures/modeleditor.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 7.2: </span><span
class="content">Creating New Model Library</span></div><!--tex4ht:label?: x1-550012 -->
<!--l. 32--><p class="indent" > </div><hr class="endfigure">
<!--l. 33--><p class="indent" > After the OK button is pressed the type of model library to be created is chosen by
selecting one of the types on the left hand side i.e. <span
class="cmtt-10x-x-109">Diode, BJT, MOS, JFET, IGBT,</span>
<span
class="cmtt-10x-x-109">Magnetic Core</span>. The template model library opens up in a tabular form as shown in Fig. <a
href="#x1-550023">7.3<!--tex4ht:ref: modelnew --></a>
<hr class="figure"><div class="figure"
>
<a
id="x1-550023"></a>
<!--l. 36--><p class="noindent" ><img
src="figures/modelnew.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 7.3: </span><span
class="content">Choosing the Template Model Library </span></div><!--tex4ht:label?: x1-550023 -->
<!--l. 39--><p class="indent" > </div><hr class="endfigure">
<!--l. 43--><p class="indent" > New parameters can be added or current parameters can be removed using <span
class="cmtt-10x-x-109">ADD</span>
and <span
class="cmtt-10x-x-109">REMOVE </span>buttons. Also the values of parameters can be changed in the table.
Adding and removing the parameters in library files is shown in the Fig. <a
href="#x1-550034">7.4<!--tex4ht:ref: modeladd --></a> and
Fig. <a
href="#x1-550045">7.5<!--tex4ht:ref: modelremove --></a>
<!--l. 45--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-550034"></a>
<!--l. 47--><p class="noindent" ><img
src="figures/modeladd.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 7.4: </span><span
class="content">Adding the Parameter in a Library</span></div><!--tex4ht:label?: x1-550034 -->
<!--l. 50--><p class="indent" > </div><hr class="endfigure">
<!--l. 52--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-550045"></a>
<!--l. 54--><p class="noindent" ><img
src="figures/modelremove.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 7.5: </span><span
class="content">Removing a Parameter from a Library </span></div><!--tex4ht:label?: x1-550045 -->
<!--l. 57--><p class="indent" > </div><hr class="endfigure">
<!--l. 59--><p class="indent" > After the editing of the model library is done, the file can be saved by selecting the <span
class="cmtt-10x-x-109">SAVE</span>
button. These libraries are saved in the <span
class="cmti-10x-x-109">User Libraries </span>folder under <span
class="cmti-10x-x-109">deviceModelLibrary</span>
repository.
<h3 class="sectionHead"><span class="titlemark">7.2 </span> <a
id="x1-560007.2"></a>Editing Current Model Library</h3>
<!--l. 62--><p class="noindent" >The existing model library can be modified using <span
class="cmtt-10x-x-109">EDIT </span>option. On clicking the <span
class="cmtt-10x-x-109">EDIT </span>button
the file dialog opens where all the library files are saved as shown in Fig. <a
href="#x1-560016">7.6<!--tex4ht:ref: modeledit --></a>. You can select
the library you want to edit. Once you are done with the editing, click on <span
class="cmtt-10x-x-109">SAVE</span>
button.
<!--l. 65--><p class="indent" > <hr class="figure"><div class="figure"
>
<a
id="x1-560016"></a>
<!--l. 67--><p class="noindent" ><img
src="figures/modeledit.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 7.6: </span><span
class="content">Editing Existing Model Library</span></div><!--tex4ht:label?: x1-560016 -->
<!--l. 70--><p class="indent" > </div><hr class="endfigure">
<h3 class="sectionHead"><span class="titlemark">7.3 </span> <a
id="x1-570007.3"></a>Uploading external .lib file to eSim repository</h3>
<!--l. 73--><p class="noindent" >eSim directly cannot use the external .lib file. It has to be uploaded to eSim repository before
using it in a circuit. eSim provides the facility to upload library files. They are then converted
into xml format, which can be easily modified from the eSim interface. On clicking <span
class="cmtt-10x-x-109">UPLOAD</span>
button the library can be uploaded from any location. The model library will be
saved with the name you have provided, in the <span
class="cmti-10x-x-109">User Libraries </span>folder of repository
<span
class="cmti-10x-x-109">deviceModelLibrary</span>.
<h2 class="chapterHead"><span class="titlemark">Chapter 8</span><br /><a
id="x1-580008"></a>SubCircuit Builder</h2> Subcircuit is a way to implement hierarchical modeling.
Once a subcircuit for a compo- nent is created, it can be used in other circuits.
eSim provides an easy way to create a subcircuit. The following Fig. <a
href="#x1-580011">8.1<!--tex4ht:ref: subcircuit_mainwin --></a> shows
the window that is opened when the SubCircuit tool is chosen from the toolbar.
<hr class="figure"><div class="figure"
>
<a
id="x1-580011"></a>
<!--l. 8--><p class="noindent" ><img
src="figures/subcirciut_window.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 8.1: </span><span
class="content">Subcircuit Window</span></div><!--tex4ht:label?: x1-580011 -->
<!--l. 11--><p class="noindent" ></div><hr class="endfigure">
<h3 class="sectionHead"><span class="titlemark">8.1 </span> <a
id="x1-590008.1"></a>Creating a SubCircuit</h3>
<!--l. 32--><p class="noindent" >The steps to create subcircuit are as follows.
<ul class="itemize1">
<li class="itemize">After opening the Subcircuit tool, click on <span
class="cmtt-10x-x-109">New Subcircuit Schematic </span>button.
It will ask the name of the subcircuit. Enter the name of subcircuit (without any
spaces) and click <span
class="cmtt-10x-x-109">OK </span>as shown in Fig. <a
href="#x1-590012">8.2<!--tex4ht:ref: newsubcktschematic --></a>.
<!--l. 39--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-590012"></a> <img
src="figures/newsubcktschematic.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 8.2: </span><span
class="content">New Sub circuit Window</span></div><!--tex4ht:label?: x1-590012 -->
<!--l. 44--><p class="noindent" ></div><hr class="endfigure">
</li>
<li class="itemize">After clicking <span
class="cmtt-10x-x-109">OK </span>button it will open KiCad schematic. Draw your circuit
which will be later used as a subcircuit. e.g the Fig. <a
href="#x1-590023">8.3<!--tex4ht:ref: createsubcktsch --></a> shows the half adder
circuit.
<!--l. 49--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-590023"></a> <img
src="figures/createsubcktsch.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 8.3: </span><span
class="content">New Sub circuit Window</span></div><!--tex4ht:label?: x1-590023 -->
<!--l. 54--><p class="noindent" ></div><hr class="endfigure">
</li>
<li class="itemize">Once you complete the circuit, assign port to the node of your circuit which will be
used to connect with the main circuit. The circuit will look like Fig. <a
href="#x1-590034">8.4<!--tex4ht:ref: halfadder --></a> after
adding PORT to it. The PORT symbol can be found in Eeschema as shown in
Fig. <a
href="#x1-590045">8.5<!--tex4ht:ref: port --></a>.
<!--l. 61--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-590034"></a> <img
src="figures/ha_sub.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 8.4: </span><span
class="content">Half-Adder Subcircuit </span></div><!--tex4ht:label?: x1-590034 -->
<!--l. 66--><p class="noindent" ></div><hr class="endfigure">
<!--l. 69--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-590045"></a> <img
src="figures/port_lib.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 8.5: </span><span
class="content">Selection of PORT component</span></div><!--tex4ht:label?: x1-590045 -->
<!--l. 74--><p class="noindent" ></div><hr class="endfigure">
</li>
<li class="itemize">Next step is to save the schematic and generate KiCad netlist as explained in Chapter
5.
</li>
<li class="itemize">To use this as a subcircuit, create a block in KiCad Eeschema by following steps given
below:
<dl class="enumerate"><dt class="enumerate">
1. </dt><dd
class="enumerate">Go to library browser of Eeschema.
</dd><dt class="enumerate">
2. </dt><dd
class="enumerate">Select the working library as eSim_Subckt as shown in Fig. <a
href="#x1-590076">8.6<!--tex4ht:ref: esimsubckt --></a> <hr class="figure"><div class="figure"
><a
id="x1-590076"></a> <img
src="figures/esim-subckt.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 8.6: </span><span
class="content">Selecting Working Library</span></div><!--tex4ht:label?: x1-590076 -->
<!--l. 90--><p class="noindent" ></div><hr class="endfigure">
</dd><dt class="enumerate">
3. </dt><dd
class="enumerate">Click on create a new component with reference X as shown in Fig. <a
href="#x1-590097">8.7<!--tex4ht:ref: subcktnewcomp --></a> <hr class="figure"><div class="figure"
><a
id="x1-590097"></a>
<img
src="figures/subcktnewcomp.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 8.7: </span><span
class="content">Creating New Component</span></div><!--tex4ht:label?: x1-590097 -->
<!--l. 99--><p class="noindent" ></div><hr class="endfigure">
</dd><dt class="enumerate">
4. </dt><dd
class="enumerate">Start drawing the subcircuit block. Update and save it as shown in Fig. <a
href="#x1-590118">8.8<!--tex4ht:ref: block --></a>.
<!--l. 104--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-590118"></a> <img
src="figures/halfadderblock.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 8.8: </span><span
class="content">Half-Adder Subcircuit Block</span></div><!--tex4ht:label?: x1-590118 -->
<!--l. 109--><p class="noindent" ></div><hr class="endfigure">
</dd></dl>
</li>
<li class="itemize">Close the Eeschema window and click on Convert KiCad to Ngspice button in subcircuit
builder tool. This will convert the KiCad spice netlist to Ngspice netlist. And it will
save your subcircuit into eSim repository, which you can add in your main
circuit.
</li></ul>
<!--l. 120--><p class="noindent" >
<h3 class="sectionHead"><span class="titlemark">8.2 </span> <a
id="x1-600008.2"></a>Edit a Subcircuit</h3>
<!--l. 121--><p class="noindent" >The steps to edit a subcircuit are as follows.
<ul class="itemize1">
<li class="itemize">After opening the Subcircuit tool, click on <span
class="cmtt-10x-x-109">Edit Subcircuit Schematic </span>button.
It will open a dialog box where you can select any subcircuit for editing.
</li>
<li class="itemize">After selecting the subcircuit it will open it in KiCad Eeschema, where you can
edit the subcircuit.
</li>
<li class="itemize">Next step is to save the schematic and generate KiCad netlist.
</li>
<li class="itemize">If you have edited the number of ports then you have to change the block in KiCad
Eeschema accordingly.
</li>
<li class="itemize">Close the Eeschema window and click on <span
class="cmtt-10x-x-109">Convert KiCad to Ngspice </span>button in
subcircuit builder tool to convert the edited subcircuit KiCad netlist into Ngspice
netlist.
</li></ul>
<h2 class="chapterHead"><span class="titlemark">Chapter 9</span><br /><a
id="x1-610009"></a>Solved Examples</h2>
<h3 class="sectionHead"><span class="titlemark">9.1 </span> <a
id="x1-620009.1"></a>Solved Examples</h3>
<!--l. 8--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">9.1.1 </span> <a
id="x1-630009.1.1"></a>Basic RC Circuit</h4>
<!--l. 9--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-640009.1.1"></a>Problem Statement:</h5>
<!--l. 9--><p class="noindent" >Plot the Input and Output Waveform of an RC circuit whose input voltage (Vs) is 50Hz,
3V peak to peak. The values of Resistor (R) and Capacitor(C) are 1<span
class="cmmi-10x-x-109">k </span>and 1<span
class="cmmi-10x-x-109">uf</span>
respectively.
<h5 class="subsubsectionHead"><a
id="x1-650009.1.1"></a>Solution:</h5>
<ul class="itemize1">
<li class="itemize">Creating a Project: The new project is created by clicking the <span
class="cmtt-10x-x-109">New </span>icon on the
menubar. The name of the project is given in the pop up window as shown in
Fig. <a
href="#x1-650011">9.1<!--tex4ht:ref: rc1 --></a>. <hr class="figure"><div class="figure"
><a
id="x1-650011"></a> <img
src="figures/rc1.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.1: </span><span
class="content">Creating New Project</span></div><!--tex4ht:label?: x1-650011 -->
<!--l. 20--><p class="noindent" ></div><hr class="endfigure">
</li>
<li class="itemize">Creating the Schematic: To create the schematic, click the very first icon of the left
toolbar as shown in the Fig. <a
href="#x1-650022">9.2<!--tex4ht:ref: rc2 --></a>. This will open KiCad Eeschema.
<!--l. 25--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-650022"></a> <img
src="figures/rc2.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.2: </span><span
class="content">Open Schematic Editor</span></div><!--tex4ht:label?: x1-650022 -->
<!--l. 31--><p class="noindent" ></div><hr class="endfigure">
<!--l. 33--><p class="noindent" >To create a schematic in KiCad, we need to place the required components. Fig. <a
href="#x1-650033">9.3<!--tex4ht:ref: rc_component --></a>
shows the icon on the right toolbar which opens the component library.
<!--l. 35--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-650033"></a> <img
src="figures/rc_component.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.3: </span><span
class="content">Place Component Icon</span></div><!--tex4ht:label?: x1-650033 -->
<!--l. 41--><p class="noindent" ></div><hr class="endfigure">
<!--l. 45--><p class="noindent" >After all the required components of the simple RC circuit are placed, wiring is done
using the <span
class="cmtt-10x-x-109">Place Wire </span>option as shown in the Fig. <a
href="#x1-650044">9.4<!--tex4ht:ref: rc_wire --></a>
<!--l. 47--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-650044"></a> <img
src="figures/rc_wire.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.4: </span><span
class="content">Place Wire Icon</span></div><!--tex4ht:label?: x1-650044 -->
<!--l. 53--><p class="noindent" ></div><hr class="endfigure">
<!--l. 55--><p class="noindent" >Next step is <span
class="cmtt-10x-x-109">ERC (Electric Rules Check)</span>. Fig. <a
href="#x1-650055">9.5<!--tex4ht:ref: erc1 --></a> shows the icon for <span
class="cmtt-10x-x-109">ERC</span>.
<!--l. 57--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-650055"></a> <img
src="figures/erc1.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.5: </span><span
class="content">Electric Rules Check Icon</span></div><!--tex4ht:label?: x1-650055 -->
<!--l. 63--><p class="noindent" ></div><hr class="endfigure">
<!--l. 65--><p class="noindent" >Fig. <a
href="#x1-650066">9.6<!--tex4ht:ref: rc_complete1 --></a> shows the RC circuit after connecting the components by wire.
<!--l. 67--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-650066"></a> <img
src="figures/rc_complete1.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.6: </span><span
class="content">RC circuit</span></div><!--tex4ht:label?: x1-650066 -->
<!--l. 72--><p class="noindent" ></div><hr class="endfigure">
<!--l. 76--><p class="noindent" >After clicking the <span
class="cmtt-10x-x-109">ERC </span>icon a window opens up. Click the <span
class="cmtt-10x-x-109">Run </span>button to run rules check.
The errors are listed in as shown in Fig. <a
href="#x1-65007r1">9.7a<!--tex4ht:ref: erc2 --></a>. This error is handled by adding <span
class="cmtt-10x-x-109">Power</span>
<span
class="cmtt-10x-x-109">Flag </span>as shown in Fig. <a
href="#x1-65008r2">9.7b<!--tex4ht:ref: rc_pwr --></a>.
<!--l. 78--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-650097"></a> <a
id="x1-65007r1"></a> <img
src="figures/erc2.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">ERC</span>
<span
class="cmr-9">Run</span> <a
id="x1-65008r2"></a> <img
src="figures/rc_pwr.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">Power</span>
<span
class="cmr-9">Flag</span>
<br /> <div class="caption"
><span class="id">Figure 9.7: </span><span
class="content">ERC check and POWER FLAG</span></div><!--tex4ht:label?: x1-650097 -->
<!--l. 87--><p class="noindent" ></div><hr class="endfigure">
<!--l. 89--><p class="noindent" >After adding the <span
class="cmtt-10x-x-109">Power Flag </span>the completed RC circuit is shown in Fig. <a
href="#x1-65010r1">9.8a<!--tex4ht:ref: rc_schematic --></a> and the
netlist is generated as shown in Fig. <a
href="#x1-65011r2">9.8b<!--tex4ht:ref: rc_netlist --></a>.
<!--l. 92--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-650128"></a> <a
id="x1-65010r1"></a> <img
src="figures/rc_schematic.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">Schematic</span>
<span
class="cmr-9">of RC</span>
<span
class="cmr-9">circuit</span> <a
id="x1-65011r2"></a> <img
src="figures/rc_netlistgeneration.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">Generating</span>
<span
class="cmr-9">KiCad</span>
<span
class="cmr-9">Netlist</span>
<span
class="cmr-9">of RC</span>
<span
class="cmr-9">circuit</span>
<br /> <div class="caption"
><span class="id">Figure 9.8: </span><span
class="content">RC Schematic and Netlist Generation</span></div><!--tex4ht:label?: x1-650128 -->
<!--l. 101--><p class="noindent" ></div><hr class="endfigure">
</li>
<li class="itemize">Convert KiCad to Ngspice: To convert KiCad netlist of RC circuit to NgSpice
compatible netlist click on KiCad to Ngspice icon as shown in Fig. <a
href="#x1-650139">9.9<!--tex4ht:ref: rcki2ng --></a>.
<!--l. 107--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-650139"></a> <img
src="figures/rc_ki2ng.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.9: </span><span
class="content">Convert KiCad to Ngspice Icon</span></div><!--tex4ht:label?: x1-650139 -->
<!--l. 112--><p class="noindent" ></div><hr class="endfigure">
<!--l. 114--><p class="noindent" >Now you can enter the type of analysis and source details as shown in Fig. <a
href="#x1-65014r1">9.10a<!--tex4ht:ref: rc_analysistab --></a> and
Fig. <a
href="#x1-65015r2">9.10b<!--tex4ht:ref: rc_sourcedetailstab --></a> respectively.
<!--l. 116--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-6501610"></a> <a
id="x1-65014r1"></a> <img
src="figures/rc_analysistab.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">RC</span>
<span
class="cmr-9">Analysis</span> <a
id="x1-65015r2"></a> <img
src="figures/rc_sourcedetailstab.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">RC</span>
<span
class="cmr-9">Source</span>
<span
class="cmr-9">Details</span>
<br /> <div class="caption"
><span class="id">Figure 9.10: </span><span
class="content">RC Analysis and Source Detail</span></div><!--tex4ht:label?: x1-6501610 -->
<!--l. 125--><p class="noindent" ></div><hr class="endfigure">
<!--l. 126--><p class="noindent" >The other tab will be empty as RC circuit do not use any Ngspice model, device library
and subcircuit.
<!--l. 128--><p class="noindent" >After entering the value, press the convert button. It will convert the netlist into
Ngspice compatible netlist.
</li>
<li class="itemize">Simulation: To run Ngspice simulation click the simulation icon in the tool bar
as shown in the Fig. <a
href="#x1-6501711">9.11<!--tex4ht:ref: rcplot --></a>. <hr class="figure"><div class="figure"
><a
id="x1-6501711"></a> <img
src="figures/rc_plot.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.11: </span><span
class="content">Simulation Icon</span></div><!--tex4ht:label?: x1-6501711 -->
<!--l. 139--><p class="noindent" ></div><hr class="endfigure">
<!--l. 141--><p class="noindent" >In eSim, there are two types of plot. First is normal Ngspice plot and second is
interactive python plot as shown in Fig. <a
href="#x1-65018r1">9.12a<!--tex4ht:ref: rc_ngspiceplot --></a> and Fig. <a
href="#x1-65019r2">9.12b<!--tex4ht:ref: rc_pythonplot --></a> respectively.
<!--l. 143--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-6502012"></a> <a
id="x1-65018r1"></a> <img
src="figures/rc_ngspiceplot.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">Ngspice</span>
<span
class="cmr-9">Plot</span>
<span
class="cmr-9">of RC</span> <a
id="x1-65019r2"></a> <img
src="figures/rc_pythonplot.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">Python</span>
<span
class="cmr-9">Plot</span>
<span
class="cmr-9">of RC</span>
<br /> <div class="caption"
><span class="id">Figure 9.12: </span><span
class="content">Ngspice and Interactive Python Plotting</span></div><!--tex4ht:label?: x1-6502012 -->
<!--l. 152--><p class="noindent" ></div><hr class="endfigure">
<!--l. 154--><p class="noindent" >In the interactive python plot you can select any node or branch to plot voltage or
current across it. Also it has the facility to plot basic functions across the node like
addition, substraction, multiplication, division and v/s.
</li></ul>
<!--l. 160--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">9.1.2 </span> <a
id="x1-660009.1.2"></a>Half Wave Rectifier</h4>
<!--l. 162--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-670009.1.2"></a>Problem Statement:</h5>
<!--l. 162--><p class="noindent" >Plot the Input and Output Waveform of Half Wave Rectifier circuit where the input voltage
(Vs) is 50Hz, 2V peak to peak. The value for Resistor (R) is 1k.
<!--l. 164--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-680009.1.2"></a>Solution:</h5>
<!--l. 165--><p class="noindent" >The new project is created by clicking the <span
class="cmtt-10x-x-109">New </span>icon on the menubar. The name of the project
is given in the window shown in Fig. <a
href="#x1-650011">9.1<!--tex4ht:ref: rc1 --></a>.
<ul class="itemize1">
<li class="itemize">Creating Schematic: To create the schematic, click the very first icon of the left
toolbar as shown in the Fig. <a
href="#x1-650022">9.2<!--tex4ht:ref: rc2 --></a>. This will open KiCad Eeschema.<br
class="newline" />
<!--l. 171--><p class="noindent" >After the KiCad window is opened, to create a schematic we need to place the
required components. Fig. <a
href="#x1-650033">9.3<!--tex4ht:ref: rc_component --></a> shows the icon on the right toolbar which opens
the component library.<br
class="newline" />
<!--l. 174--><p class="noindent" >After all the required components of the simple Half Wave rectifier circuits are
placed, wiring is done using the <span
class="cmtt-10x-x-109">Place Wire </span>option as shown in the Fig. <a
href="#x1-650044">9.4<!--tex4ht:ref: rc_wire --></a><br
class="newline" />
<!--l. 176--><p class="noindent" >Next step is <span
class="cmtt-10x-x-109">ERC (Electric Rules Check)</span>. Fig. <a
href="#x1-650055">9.5<!--tex4ht:ref: erc1 --></a> shows the icon for <span
class="cmtt-10x-x-109">ERC</span>. After
completing all the above steps the final Half Wave Rectifier schematic will look
like Fig. <a
href="#x1-6800113">9.13<!--tex4ht:ref: hwr_schematic --></a>.<br
class="newline" />
<!--l. 178--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-6800113"></a> <img
src="figures/hwr_schematic.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.13: </span><span
class="content">Schematic of Half Wave Rectifier circuit</span></div><!--tex4ht:label?: x1-6800113 -->
<!--l. 183--><p class="noindent" ></div><hr class="endfigure">
<!--l. 187--><p class="noindent" >KiCad netlist is generated as shown in the Fig. <a
href="#x1-6800214">9.14<!--tex4ht:ref: hwr_netlistgeneration --></a> <br
class="newline" />
<!--l. 189--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-6800214"></a> <img
src="figures/hwr_netlistgeneration.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.14: </span><span
class="content">Half Wave Rectifier circuit Netlist Generation</span></div><!--tex4ht:label?: x1-6800214 -->
<!--l. 194--><p class="noindent" ></div><hr class="endfigure">
</li>
<li class="itemize">Convert KiCad to Ngspice: After creating KiCad netlist, click on the <span
class="cmtt-10x-x-109">KiCad-Ngspice</span>
<span
class="cmtt-10x-x-109">converter </span>button. This will open converter window where you can enter details of
Analysis, Source values and Device library.
<!--l. 198--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-6800615"></a> <a
id="x1-68003r1"></a> <img
src="figures/hwr_analysistab.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">Half</span>
<span
class="cmr-9">Wave</span>
<span
class="cmr-9">Rectifier</span>
<span
class="cmr-9">Analysis</span> <a
id="x1-68004r2"></a> <img
src="figures/hwr_sourcedetailstab.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">Half</span>
<span
class="cmr-9">Wave</span>
<span
class="cmr-9">Rectifier</span>
<span
class="cmr-9">Source</span>
<span
class="cmr-9">Details</span> <a
id="x1-68005r3"></a> <img
src="figures/hwr_devicemodelingtab.png" alt="PIC"
>
<span
class="cmr-9">(c)</span>
<span
class="cmr-9">Half</span>
<span
class="cmr-9">Wave</span>
<span
class="cmr-9">Rectifier</span>
<span
class="cmr-9">Device</span>
<span
class="cmr-9">Modeling</span>
<br /> <div class="caption"
><span class="id">Figure 9.15: </span><span
class="content">Analysis, Source and Device Tab</span></div><!--tex4ht:label?: x1-6800615 -->
<!--l. 210--><p class="noindent" ></div><hr class="endfigure">
<!--l. 212--><p class="noindent" >Under device library you can add the library for diode used in the circuit. If you do not
add any library it will take default Ngspice model.
</li>
<li class="itemize">Simulation: Once the KiCad-Ngspice converter runs successfully, you can run
simulation by clicking the simulation button in the toolbar. <hr class="figure"><div class="figure"
><a
id="x1-6800916"></a> <a
id="x1-68007r1"></a> <img
src="figures/hwr_ngspiceplot.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">Ngspice</span>
<span
class="cmr-9">Plot</span>
<span
class="cmr-9">of</span>
<span
class="cmr-9">Half</span>
<span
class="cmr-9">Wave</span>
<span
class="cmr-9">Rectifier</span> <a
id="x1-68008r2"></a> <img
src="figures/hwr_pythonplot.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">Python</span>
<span
class="cmr-9">Plot</span>
<span
class="cmr-9">of</span>
<span
class="cmr-9">Half</span>
<span
class="cmr-9">Wave</span>
<span
class="cmr-9">Rectifier</span>
<br /> <div class="caption"
><span class="id">Figure 9.16: </span><span
class="content">Half Wave Rectifier Simulation Output</span></div><!--tex4ht:label?: x1-6800916 -->
<!--l. 225--><p class="noindent" ></div><hr class="endfigure">
</li></ul>
<!--l. 232--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">9.1.3 </span> <a
id="x1-690009.1.3"></a>Precision Rectifier</h4>
<!--l. 233--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-700009.1.3"></a>Problem Statement:</h5>
<!--l. 233--><p class="noindent" >Plot the input and output waveform of the Precision Rectifier circuit where input voltage
(Vs) is 50<span
class="cmmi-10x-x-109">Hz </span>, 3<span
class="cmmi-10x-x-109">V </span>peak to peak.
<!--l. 235--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-710009.1.3"></a>Solution:</h5>
<!--l. 236--><p class="noindent" >The new project is created by clicking the <span
class="cmtt-10x-x-109">New </span>icon on the menubar. The name of the project
is given as shown in the Fig. <a
href="#x1-650011">9.1<!--tex4ht:ref: rc1 --></a>.
<ul class="itemize1">
<li class="itemize">Creating Schematic: To create the schematic, click the very first icon of the left
toolbar as shown in the Fig. <a
href="#x1-650022">9.2<!--tex4ht:ref: rc2 --></a>. This will open KiCad Eeschema.<br
class="newline" />After the KiCad window is opened, to create a schematic we need to place the
required components. Fig. <a
href="#x1-650033">9.3<!--tex4ht:ref: rc_component --></a> shows the icon on the right toolbar which opens
the component library.<br
class="newline" />After all the required components of the precision rectifier circuit are placed,
wiring is done using the <span
class="cmtt-10x-x-109">Place Wire </span>option as shown in the Fig. <a
href="#x1-650044">9.4<!--tex4ht:ref: rc_wire --></a>.<br
class="newline" />Next step is <span
class="cmtt-10x-x-109">ERC (Electric Rules Check)</span>. Fig. <a
href="#x1-650055">9.5<!--tex4ht:ref: erc1 --></a> shows the icon for <span
class="cmtt-10x-x-109">ERC</span>. The
Fig. <a
href="#x1-7100117">9.17<!--tex4ht:ref: pr_schematic --></a> shows the complete Precision Rectifier schematic after removing the
errors.
<!--l. 246--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-7100117"></a> <img
src="figures/pr_schematic.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.17: </span><span
class="content">Schematic of Precision Rectifier circuit</span></div><!--tex4ht:label?: x1-7100117 -->
<!--l. 251--><p class="noindent" ></div><hr class="endfigure">
<!--l. 253--><p class="noindent" >The KiCad netlist is generated as shown in Fig. <a
href="#x1-7100218">9.18<!--tex4ht:ref: pr_netlistgeneration --></a>.<br
class="newline" />
<!--l. 255--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-7100218"></a> <img
src="figures/pr_netlistgeneration.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.18: </span><span
class="content">Precision Rectifier circuit Netlist Generation</span></div><!--tex4ht:label?: x1-7100218 -->
<!--l. 260--><p class="noindent" ></div><hr class="endfigure">
</li>
<li class="itemize">Convert KiCad to Ngspice: After creating KiCad netlist, click on KiCad-Ngspice
converter button.<br
class="newline" />
<!--l. 266--><p class="noindent" >This will open converter window where you can enter details of Analysis, Source values,
Device library and Subcircuit.
<!--l. 268--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-7100719"></a> <a
id="x1-71003r1"></a> <img
src="figures/pr_analysistab.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">Precision</span>
<span
class="cmr-9">Rectifier</span>
<span
class="cmr-9">Analysis</span> <a
id="x1-71004r2"></a> <img
src="figures/pr_sourcedetailstab.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">Precision</span>
<span
class="cmr-9">Rectifier</span>
<span
class="cmr-9">Source</span>
<span
class="cmr-9">Details</span>
<a
id="x1-71005r3"></a>
<!--l. 278--><p class="noindent" > <img
src="figures/pr_devicemodelingtab.png" alt="PIC"
>
<span
class="cmr-9">(c)</span>
<span
class="cmr-9">Precision</span>
<span
class="cmr-9">Rectifier</span>
<span
class="cmr-9">Device</span>
<span
class="cmr-9">Modeling</span> <a
id="x1-71006r4"></a> <img
src="figures/pr_subcircuitstab.png" alt="PIC"
>
<span
class="cmr-9">(d)</span>
<span
class="cmr-9">Precision</span>
<span
class="cmr-9">Rectifier</span>
<span
class="cmr-9">Subcircuit</span>
<br /> <div class="caption"
><span class="id">Figure 9.19: </span><span
class="content">Analysis, Source, Device library and Subcircuit tab</span></div><!--tex4ht:label?: x1-7100719 -->
<!--l. 283--><p class="noindent" ></div><hr class="endfigure">
<!--l. 285--><p class="noindent" >Under device library you can add the library for the diode used in the circuit. If you do
not add any library it will take default Ngspice model for diode.<br
class="newline" />
<!--l. 288--><p class="noindent" >Under subcircuit tab you have to add the subciruit used in your circuit. If you forget to
add subcircuit it will throw an error.
</li>
<li class="itemize">Simulation: Once the KiCad-Ngspice converter runs successfully, you can run the
simulation by clicking the simulation button in the toolbar. <hr class="figure"><div class="figure"
><a
id="x1-7101020"></a> <a
id="x1-71008r1"></a> <img
src="figures/pr_ngspiceplot.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">Ngspice</span>
<span
class="cmr-9">Plot</span>
<span
class="cmr-9">of</span>
<span
class="cmr-9">Precision</span>
<span
class="cmr-9">Rectifier</span> <a
id="x1-71009r2"></a> <img
src="figures/pr_pythonplot.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">Python</span>
<span
class="cmr-9">Plot</span>
<span
class="cmr-9">of</span>
<span
class="cmr-9">Precision</span>
<span
class="cmr-9">Rectifier</span>
<br /> <div class="caption"
><span class="id">Figure 9.20: </span><span
class="content">Precision Rectifier Simulation Output</span></div><!--tex4ht:label?: x1-7101020 -->
<!--l. 302--><p class="noindent" ></div><hr class="endfigure">
</li></ul>
<!--l. 309--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">9.1.4 </span> <a
id="x1-720009.1.4"></a>Inverting Amplifier</h4>
<!--l. 310--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-730009.1.4"></a>Problem Statement:</h5>
<!--l. 311--><p class="noindent" >Plot the Input and Output Waveform of Inverting Amplifier circuit where the input voltage
(Vs) is 50<span
class="cmmi-10x-x-109">Hz</span>, 2<span
class="cmmi-10x-x-109">V </span>peak to peak and gain is 2.
<h5 class="subsubsectionHead"><a
id="x1-740009.1.4"></a>Solution:</h5>
<ul class="itemize1">
<li class="itemize">Creating Schematic: To create the schematic, click the very first icon of the left
toolbar as shown in the Fig. <a
href="#x1-650022">9.2<!--tex4ht:ref: rc2 --></a>. This will open KiCad Eeschema.<br
class="newline" />After the KiCad window is opened, to create a schematic we need to place the
required components. Fig. <a
href="#x1-650033">9.3<!--tex4ht:ref: rc_component --></a> shows the icon on the right toolbar which opens
the component library.<br
class="newline" />After all the required components of the inverting amplifier circuit are placed,
wiring is done using the <span
class="cmtt-10x-x-109">Place Wire </span>option as shown in the Fig. <a
href="#x1-650044">9.4<!--tex4ht:ref: rc_wire --></a>.<br
class="newline" />Next step is <span
class="cmtt-10x-x-109">ERC (Electric Rules Check)</span>. Fig. <a
href="#x1-650055">9.5<!--tex4ht:ref: erc1 --></a> shows the icon for <span
class="cmtt-10x-x-109">ERC</span>.
<!--l. 321--><p class="noindent" >The Fig. <a
href="#x1-7400121">9.21<!--tex4ht:ref: ia_schematic --></a> shows the complete Precision Rectifier schematic after removing
the errors.
<!--l. 323--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-7400121"></a> <img
src="figures/ia_schematic.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.21: </span><span
class="content">Schematic of Inverting Amplifier circuit</span></div><!--tex4ht:label?: x1-7400121 -->
<!--l. 328--><p class="noindent" ></div><hr class="endfigure">
<!--l. 330--><p class="noindent" >The KiCad netlist is generated as shown in Fig. <a
href="#x1-7400222">9.22<!--tex4ht:ref: ia_netlistgeneration --></a>.<br
class="newline" /><hr class="figure"><div class="figure"
><a
id="x1-7400222"></a> <img
src="figures/ia_netlistgeneration.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.22: </span><span
class="content">Inverting Amplifier circuit Netlist Generation</span></div><!--tex4ht:label?: x1-7400222 -->
<!--l. 336--><p class="noindent" ></div><hr class="endfigure">
</li>
<li class="itemize">Convert KiCad to Ngspice: After creating KiCad netlist, click on KiCad-Ngspice
converter button.<br
class="newline" />
<!--l. 342--><p class="noindent" >This will open converter window where you can enter details of Analysis, Source values,
Device library and Subcircuit.
<!--l. 344--><p class="noindent" >Subcircuit of Op-Amp is shown in Fig. <a
href="#x1-74006r4">9.23d<!--tex4ht:ref: ia_sub --></a> <hr class="figure"><div class="figure"
><a
id="x1-7400723"></a> <a
id="x1-74003r1"></a> <img
src="figures/ia_analysistab.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">Inverting</span>
<span
class="cmr-9">Amplifier</span>
<span
class="cmr-9">Analysis</span> <a
id="x1-74004r2"></a> <img
src="figures/ia_sourcedetailstab.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">Inverting</span>
<span
class="cmr-9">Amplifier</span>
<span
class="cmr-9">Source</span>
<span
class="cmr-9">Details</span>
<a
id="x1-74005r3"></a>
<!--l. 355--><p class="noindent" > <img
src="figures/ia_subcircuitstab.png" alt="PIC"
>
<span
class="cmr-9">(c)</span>
<span
class="cmr-9">Inverting</span>
<span
class="cmr-9">Amplifier</span>
<span
class="cmr-9">Subcircuit</span> <a
id="x1-74006r4"></a> <img
src="figures/ia_sub.png" alt="PIC"
>
<span
class="cmr-9">(d)</span>
<span
class="cmr-9">Sub-Circuit</span>
<span
class="cmr-9">of</span>
<span
class="cmr-9">Op-Amp</span>
<br /> <div class="caption"
><span class="id">Figure 9.23: </span><span
class="content">Analysis, Source, and Subcircuit tab</span></div><!--tex4ht:label?: x1-7400723 -->
<!--l. 360--><p class="noindent" ></div><hr class="endfigure">
<!--l. 363--><p class="noindent" >Under subcircuit tab you have to add the subciruit used in your circuit. If you forget to
add subcircuit, it will throw an error.<br
class="newline" />
</li>
<li class="itemize">Simulation: Once the KiCad-Ngspice converter runs successfully, you can run
simulation by clicking the simulation button in the toolbar. <hr class="figure"><div class="figure"
><a
id="x1-7401024"></a> <a
id="x1-74008r1"></a> <img
src="figures/ia_ngspiceplot.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">Inverting</span>
<span
class="cmr-9">Amplifier</span>
<span
class="cmr-9">Ngspice</span>
<span
class="cmr-9">Plot</span>
<a
id="x1-74009r2"></a>
<!--l. 374--><p class="noindent" > <img
src="figures/ia_pythonplot.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">Inverting</span>
<span
class="cmr-9">Amplifier</span>
<span
class="cmr-9">Python</span>
<span
class="cmr-9">Plot</span>
<br /> <div class="caption"
><span class="id">Figure 9.24: </span><span
class="content">Inverting Amplifier Simulation Output</span></div><!--tex4ht:label?: x1-7401024 -->
<!--l. 376--><p class="noindent" ></div><hr class="endfigure">
</li></ul>
<!--l. 386--><p class="noindent" >
<h4 class="subsectionHead"><span class="titlemark">9.1.5 </span> <a
id="x1-750009.1.5"></a>Half Adder Example</h4>
<!--l. 388--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-760009.1.5"></a>Problem Statement:</h5>
<!--l. 388--><p class="noindent" >Plot the Input and Output Waveform of Half Adder circuit.
<!--l. 390--><p class="noindent" >
<h5 class="subsubsectionHead"><a
id="x1-770009.1.5"></a>Solution:</h5>
<ul class="itemize1">
<li class="itemize">Creating Schematic: To create the schematic, click the very first icon of the left
toolbar as shown in the Fig. <a
href="#x1-650022">9.2<!--tex4ht:ref: rc2 --></a>. This will open KiCad Eeschema.<br
class="newline" />After the KiCad window is opened, to create a schematic we need to place the
required components. Fig. <a
href="#x1-650033">9.3<!--tex4ht:ref: rc_component --></a> shows the icon on the right toolbar which opens
the component library.<br
class="newline" />After all the required components of the Half Adder circuit are placed, wiring is
done using the <span
class="cmtt-10x-x-109">Place Wire </span>option as shown in the Fig. <a
href="#x1-650044">9.4<!--tex4ht:ref: rc_wire --></a>.<br
class="newline" />Next step is <span
class="cmtt-10x-x-109">ERC (Electric Rules Check)</span>. Fig. <a
href="#x1-650055">9.5<!--tex4ht:ref: erc1 --></a> shows the icon for <span
class="cmtt-10x-x-109">ERC</span>.
<!--l. 399--><p class="noindent" >The Fig. <a
href="#x1-7700125">9.25<!--tex4ht:ref: ha_schematic --></a> shows the complete Half Adder schematic after removing the
errors. <hr class="figure"><div class="figure"
><a
id="x1-7700125"></a> <img
src="figures/ha_schematic.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.25: </span><span
class="content">Schematic of Half Adder circuit</span></div><!--tex4ht:label?: x1-7700125 -->
<!--l. 405--><p class="noindent" ></div><hr class="endfigure">
<!--l. 407--><p class="noindent" >The KiCad netlist is generated as shown in Fig. <a
href="#x1-7700226">9.26<!--tex4ht:ref: ha_netlistgeneration --></a>.<br
class="newline" /><hr class="figure"><div class="figure"
><a
id="x1-7700226"></a> <img
src="figures/ha_netlistgeneration.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.26: </span><span
class="content">Half Adder circuit Netlist Generation</span></div><!--tex4ht:label?: x1-7700226 -->
<!--l. 413--><p class="noindent" ></div><hr class="endfigure">
</li>
<li class="itemize">Convert KiCad to Ngspice: After creating KiCad netlist click on KiCad-Ngspice
converter button.<br
class="newline" />
<!--l. 420--><p class="noindent" >This will open converter window where you can enter details of Analysis, Source values,
Ngspice model and Subcircuit.
<!--l. 422--><p class="noindent" ><hr class="figure"><div class="figure"
><a
id="x1-7700727"></a> <a
id="x1-77003r1"></a> <img
src="figures/ha_analysistab.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">Half</span>
<span
class="cmr-9">Adder</span>
<span
class="cmr-9">Analysis</span> <a
id="x1-77004r2"></a> <img
src="figures/ha_sourcedetailstab.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">Half</span>
<span
class="cmr-9">Adder</span>
<span
class="cmr-9">Source</span>
<span
class="cmr-9">Details</span>
<a
id="x1-77005r3"></a>
<!--l. 432--><p class="noindent" > <img
src="figures/ha_ngspicemodeltab.png" alt="PIC"
>
<span
class="cmr-9">(c)</span>
<span
class="cmr-9">Half</span>
<span
class="cmr-9">Adder</span>
<span
class="cmr-9">Ngspice</span>
<span
class="cmr-9">Model</span> <a
id="x1-77006r4"></a> <img
src="figures/ha_subcircuitstab.png" alt="PIC"
>
<span
class="cmr-9">(d)</span>
<span
class="cmr-9">Half</span>
<span
class="cmr-9">Adder</span>
<span
class="cmr-9">Subcircuit</span>
<span
class="cmr-9">Model</span>
<br /> <div class="caption"
><span class="id">Figure 9.27: </span><span
class="content">Analysis, Source, Ngspice Model and Subcircuit tab</span></div><!--tex4ht:label?: x1-7700727 -->
<!--l. 437--><p class="noindent" ></div><hr class="endfigure">
<!--l. 439--><p class="noindent" >Subcircuit of Half Adder in Fig. <a
href="#x1-7700828">9.28<!--tex4ht:ref: ha_sub --></a> <hr class="figure"><div class="figure"
><a
id="x1-7700828"></a> <img
src="figures/ha_sub.png" alt="PIC"
>
<br /> <div class="caption"
><span class="id">Figure 9.28: </span><span
class="content">Half Adder Subcircuit</span></div><!--tex4ht:label?: x1-7700828 -->
<!--l. 445--><p class="noindent" ></div><hr class="endfigure">
</li>
<li class="itemize">Simulation: Once the KiCad-Ngspice converter runs successfully, you can run
simulation by clicking the simulation button in the toolbar. <hr class="figure"><div class="figure"
><a
id="x1-7701129"></a> <a
id="x1-77009r1"></a> <img
src="figures/ha_ngspiceplot.png" alt="PIC"
>
<span
class="cmr-9">(a)</span>
<span
class="cmr-9">Half</span>
<span
class="cmr-9">Adder</span>
<span
class="cmr-9">Ngspice</span>
<span
class="cmr-9">Plot</span> <a
id="x1-77010r2"></a> <img
src="figures/ha_pythonplot.png" alt="PIC"
>
<span
class="cmr-9">(b)</span>
<span
class="cmr-9">Half</span>
<span
class="cmr-9">Adder</span>
<span
class="cmr-9">Python</span>
<span
class="cmr-9">Plot</span>
<br /> <div class="caption"
><span class="id">Figure 9.29: </span><span
class="content">Half Adder Simulation Output</span></div><!--tex4ht:label?: x1-7701129 -->
<!--l. 459--><p class="noindent" ></div><hr class="endfigure">
</li></ul>
<h2 class="likechapterHead"><a
id="x1-780009.1.5"></a>References</h2><a
id="Q1-1-166"></a>
<div class="thebibliography">
<p class="bibitem" ><span class="biblabel">
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<span
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<p class="bibitem" ><span class="biblabel">
[2]<span class="bibsp">   </span></span><a
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[5]<span class="bibsp">   </span></span><a
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</div>
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