blob: 8a93a7301d1d4a7e2bcc2feb0f1443a61ab85a03 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
|
<html>
<head>
<style>
body {
font-family: sans-serif;
margin: 0px;
padding: 0px;
background-color: #efefef;
}
h1{
font-weight: bold;
font-size: 22pt;
color: #eeeeee;
padding: 10px;
background-color: #165982;
border: 4px outset #0E324B;
}
p{
margin: 0px 10px 0px 10px;
font-size: 13pt;
}
pre{
margin: 0px 10px 0px 10px;
font-family: monospaced;
font-size: 10pt;
}
#license{
font-size:8pt;
}
</style>
<head>
<body>
<h1>About eSim</h1>
<center><img src="../../images/logo.png" alt="eSim logo" height="100" width="100"></center>
<br/>
<p>
<b>eSim</b> is an open source EDA tool for circuit design, simulation, analysis and PCB design. It is an integrated tool built using open source softwares such as KiCad (<a href="https://www.kicad.org">https://www.kicad.org/</a>), Makerchip IDE (<a href="https://www.makerchip.com/">https://www.makerchip.com/</a>), Ngspice (<a href="http://ngspice.sourceforge.net">http://ngspice.sourceforge.net</a>), GHDL (<a href="http://ghdl.free.fr">http://ghdl.free.fr</a>) and Verilator (<a href="https://www.veripool.org/verilator/">https://www.veripool.org/verilator/</a>). eSim source is released under <b>GNU General Public License.</b>
</p>
<br/>
<p>
This tool is developed by the <b>FOSSEE team at IIT Bombay</b>. To know more about eSim, please visit: <a href="https://esim.fossee.in">https://esim.fossee.in</a>.
</p>
<br/>
<p>
To discuss more about eSim, please visit: <a href="https://forums.fossee.in">https://forums.fossee.in</a>
</p>
<br/>
</body>
</html>
|
