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This directory contains a mixed mode pll, combining
ngspice and XSPICE circuit blocks.
The pll consists of the following blocks:
** voltage controlled oscillator:
vco_sub.cir
7 stage ring oscillator with gain cells, CMOS devices
or
vco_sub_new.cir
vco made from code model d_osc, cntl_array/freq_array data
are gained by running test-vco.cir with vco_sub.cir
** digital divider and frequency reference:
pll-xspice.cir
** phase frequency detector:
f-p-det-d-sub.cir
** loop filter:
loop-filter.cir
switched current sources as charge pump, 2nd order
passive RC filter
or
loop-filter-2.cir
transistors as switches for charge pump, 2nd or 3rd
order passive RC filters
** main simulation control:
pll-xspice.cir
Two test files are included:
test-vco.cir simulates vco frequency versus control voltage
test-f-p-det.cir simulates the phase frequency detector and the loop filter.
The main building blocks are organised as subcircuits.
main simulation control with three reference frequencies:
pll-xspice-fstep.cir
simulates two steps of the reference in one simulation run
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