summaryrefslogtreecommitdiff
path: root/Windows/spice/examples/cider/parallel/eclinv.cir
blob: a63c1c14e78e59bd75a2d036d001a4d80233cc26 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
ECL INVERTER
*** (FROM MEINERZHAGEN ET AL.)

VCC 1 0 0.0V
VEE 2 0 -5.2V

VIN 3 0 -1.25V
VRF 4 0 -1.25V

*** INPUT STAGE
Q1 5 3 9 M_NPNS AREA=8
Q2 6 4 9 M_NPNS AREA=8
R1 1 5 662
R2 1 6 662
R3 9 2 2.65K

*** OUTPUT BUFFERS
Q3 1 5 7 M_NPNS AREA=8
Q4 1 6 8 M_NPNS AREA=8
R4 7 2 4.06K
R5 8 2 4.06K

*** MODEL LIBRARY
.INCLUDE BICMOS.LIB

.DC VIN -2.00 0.001 0.05
.PLOT DC V(7) V(8)

.OPTIONS ACCT BYPASS=1
.END