Examples - eSim/.git - This repository contain source code for new flow of FreeEDA now know as eSim

Mode	Name	Size
d---------	4_bit_JK_ff	441	log plain
d---------	BJT_Biascircuit	450	log plain
d---------	BJT_CB_config	438	log plain
d---------	BJT_CE_config	490	log plain
d---------	BJT_Frequency_Response	432	log plain
d---------	BJT_amplifier	490	log plain
d---------	BasicGates	487	log plain
d---------	CMOS_Inverter	595	log plain
d---------	Clampercircuit	442	log plain
d---------	Clippercircuit	442	log plain
d---------	Diac_Triac	795	log plain
d---------	Differentiator	641	log plain
d---------	Diode_characteristics	484	log plain
d---------	FET_Amplifier	490	log plain
d---------	FET_Characteristic	468	log plain
d---------	FrequencyResponse_JFET	553	log plain
d---------	FullAdder	760	log plain
d---------	FullwaveRectifier_SCR	687	log plain
d---------	Fullwavebridgerectifier	496	log plain
d---------	HalfAdder	641	log plain
d---------	HalfwaveRectifier_SCR	654	log plain
d---------	Halfwave_Rectifier	523	log plain
d---------	High_Pass_Filter	421	log plain
d---------	Integrator	617	log plain
d---------	InvertingAmplifier	665	log plain
d---------	JK_Flipflop	342	log plain
d---------	Low_Pass_Filter	415	log plain
d---------	Parallel_Resonance	433	log plain
d---------	RC	337	log plain
d---------	RL	337	log plain
d---------	RLC	343	log plain
d---------	Series_Resonance	421	log plain
d---------	Transformer	342	log plain
d---------	Zener_Characteristic	387	log plain