Examples - eSim/.git - This repository contain source code for new flow of FreeEDA now know as eSim

Mode	Name	Size
d---------	4_bit_JK_ff	543	log plain
d---------	7805VoltageRegulator	1146	log plain
d---------	7812VoltageRegulator	983	log plain
d---------	Analysis_Of_Digital_IC	390	log plain
d---------	Astable555	67	log plain
d---------	BJT_Biascircuit	614	log plain
d---------	BJT_CB_config	596	log plain
d---------	BJT_CE_config	596	log plain
d---------	BJT_Frequency_Response	710	log plain
d---------	BJT_amplifier	737	log plain
d---------	BasicGates	681	log plain
d---------	CMOS_Inverter	848	log plain
d---------	Clampercircuit	603	log plain
d---------	Clippercircuit	603	log plain
d---------	Diac_Triac	1236	log plain
d---------	Differentiator	649	log plain
d---------	Digitaldecoderusing5554017	1521	log plain
d---------	Diode_characteristics	666	log plain
d---------	Dualtimer	1325	log plain
d---------	FET_Amplifier	596	log plain
d---------	FET_Characteristic	641	log plain
d---------	FrequencyResponse_JFET	792	log plain
d---------	FullAdder	1165	log plain
d---------	FullwaveRectifier_SCR	993	log plain
d---------	Fullwavebridgerectifier	684	log plain
d---------	Half_Adder	625	log plain
d---------	HalfwaveRectifier_SCR	993	log plain
d---------	Halfwave_Rectifier	639	log plain
d---------	High_Pass_Filter	533	log plain
d---------	Integrator	693	log plain
d---------	Integrator_LM_741	1097	log plain
d---------	InvertingAmplifier	1030	log plain
d---------	JK_Flipflop	543	log plain
d---------	Low_Pass_Filter	579	log plain
d---------	Monostable555	1156	log plain
d---------	NGHDL_Examples	200	log plain
d---------	Parallel_Resonance	606	log plain
d---------	RC	462	log plain
d---------	RL	421	log plain
d---------	RLC	471	log plain
d---------	Series_Resonance	533	log plain
d---------	Transformer	493	log plain
d---------	UJT_Relaxation_Oscillator	983	log plain
d---------	Zener_Characteristic	608	log plain