Examples - eSim/.git - This repository contain source code for new flow of FreeEDA now know as eSim

Mode	Name	Size
d---------	4_bit_JK_ff	457	log plain
d---------	7805VoltageRegulator	1060	log plain
d---------	7812VoltageRegulator	897	log plain
d---------	Analysis_Of_Digital_IC	390	log plain
d---------	Astable555	67	log plain
d---------	BJT_Biascircuit	528	log plain
d---------	BJT_CB_config	510	log plain
d---------	BJT_CE_config	510	log plain
d---------	BJT_Frequency_Response	624	log plain
d---------	BJT_amplifier	651	log plain
d---------	BasicGates	595	log plain
d---------	Clampercircuit	517	log plain
d---------	Clippercircuit	517	log plain
d---------	Diac_Triac	1150	log plain
d---------	Differentiator	563	log plain
d---------	Diode_characteristics	580	log plain
d---------	Dualtimer	1239	log plain
d---------	FET_Amplifier	510	log plain
d---------	FET_Characteristic	555	log plain
d---------	FrequencyResponse_JFET	706	log plain
d---------	FullAdder	1079	log plain
d---------	FullwaveRectifier_SCR	907	log plain
d---------	Fullwavebridgerectifier	598	log plain
d---------	Half_Adder	539	log plain
d---------	HalfwaveRectifier_SCR	907	log plain
d---------	Halfwave_Rectifier	553	log plain
d---------	High_Pass_Filter	447	log plain
d---------	Integrator	607	log plain
d---------	Integrator_LM_741	1011	log plain
d---------	InvertingAmplifier	944	log plain
d---------	JK_Flipflop	457	log plain
d---------	Low_Pass_Filter	493	log plain
d---------	Monostable555	1070	log plain
d---------	NGHDL_Examples	200	log plain
d---------	Parallel_Resonance	520	log plain
d---------	RC	376	log plain
d---------	RL	335	log plain
d---------	RLC	385	log plain
d---------	Series_Resonance	447	log plain
d---------	Transformer	407	log plain
d---------	UJT_Relaxation_Oscillator	897	log plain
d---------	Zener_Characteristic	522	log plain