eSim
An open source EDA tool for circuit design,
simulation, analysis and PCB design
eSim User Manual
version 1.0.0
Prepared By:
eSim Team
FOSSEE at IIT,Bombay
Indian Institute of Technology Bombay
August 2015
eSim
An open source EDA tool for circuit design,
simulation, analysis and PCB design
eSim User Manual
version 1.0.0
Prepared By:
eSim Team
FOSSEE at IIT,Bombay
Indian Institute of Technology Bombay
August 2015
Let us see the steps involved in EDA. In the first stage, the specifications of the system are laid out. These specifications are then converted to a design. The design could be in the form of a circuit schematic, logical description using an HDL language, etc. The design is then simulated and re-designed, if needed, to achieve the desired results. Once simulation achieves the specifications, the design is either converted to a PCB, a chip layout, or ported to an FPGA. The final product is again tested for specifications. The whole cycle is repeated until desired results are obtained [9].
A person who builds an electronic system has to first design the circuit, produce a virtual representation of it through a schematic for easy comprehension, simulate it and finally convert it into a Printed Circuit Board (PCB). There are various tools available that will help us do this. Some of the popular EDA tools are those of Cadence, Synopys, Mentor Graphics and Xilinx. Although these are fairly comprehensive and high end, their licenses are expensive, being proprietary.
There are some free and open source EDA tools like gEDA, KiCad and Ngspice. The main drawback of these open source tools is that they are not comprehensive. Some of them are capable of PCB design (e.g. KiCad) while some of them are capable of performing simulations (e.g. gEDA). To the best of our knowledge, there is no open source software that can perform circuit design, simulation and layout design together. eSim is capable of doing all of the above.
eSim is a free and open source EDA tool. It is an acronym for Electronics Simulation. eSim is created using open source software packages, such as KiCad, Ngspice and Python. Using eSim, one can create circuit schematics, perform simulations and design PCB layouts. It can create or edit new device models, and create or edit subcircuits for simulation.
Because of these reasons, eSim is expected to be useful for students, teachers and other professionals who would want to study and/or design electronic systems. eSim is also useful for entrepreneurs and small scale enterprises who do not have the capability to invest in heavily priced proprietary tools.
This book introduces eSim to the reader and illustrates all the features of eSim with examples. Chapter 2 gives step by step instructions to install eSim on a typical computer system and to validate the installation. The software architecture of eSim is presented in Chapter 3. Chapter 4 gets the user started with eSim. It takes them through a tour of eSim with the help of a simple RC circuit example. Chapter 5 illustrates how to simulate circuits. Chapter 6 explains PCB design using eSim, in detail. The advanced features of eSim such as Model Builder covered in Chapter 7 and Sub circuiting is covered in Chapter 8. Chapter 9 illustrates how to use eSim for solving problems.
The following convention has been adopted throughout this manual.All the menu names, options under each menu item, tool names, certain points to be noted, etc., are given in italics. Some keywords, names of certain windows/dialog boxes, names of some files/projects/folders, messages displayed during an activity, names of websites, component references, etc., are given in typewriter font. Some key presses, e.g. Enter key, F1 key, y for yes, etc., are also mentioned in typewriter font.
To install eSim and other dependecies run the following command.
$ ../install-linux.sh –install
Above script will install eSim along with dependencies.
eSim will be installed to /opt/eSim
To run eSim you can directly run it from terminal as
$ esim
or you can double click on eSim icon created on desktop after installation.
eSim is a CAD tool that helps electronic system designers to design, test and analyse their circuits. But the important feature of this tool is that it is open source and hence the user can modify the source as per his/her need. The software provides a generic, modular and extensible platform for experiment with electronic circuits. This software runs on all Ubuntu Linux distributions and some flavours of Windows. It uses Python, KiCad and Ngspice.
The objective behind the development of eSim is to provide an open source EDA solution for electronics and electrical engineers. The software should be capable of performing schematic creation, PCB design and circuit simulation (analog, digital and mixed signal). It should provide facilities to create new models and components. The architecture of eSim has been designed by keeping these objectives in mind.
Various open-source tools have been used for the underlying build-up of eSim. In this section we will give a brief idea about all the modules used in eSim.
Eeschema is an integrated software where all functions of circuit drawing, control, layout, library management and access to the PCB design software are carried out. It is the schematic editor tool used in KiCad [11]. Eeschema is intended to work with PCB layout software such as Pcbnew. It provides netlist that describes the electrical connections of the PCB. Eeschema also integrates a component editor which allows the creation, editing and visualization of components. It also allows the user to effectively handle the symbol libraries i.e; import, export, addition and deletion of library components. Eeschema also integrates the following additional but essential functions needed for a modern schematic capture software: 1. Design rules check (DRC) for the automatic control of incorrect connections and inputs of components left unconnected. 2. Generation of layout files in POSTSCRIPT or HPGL format. 3. Generation of layout files printable via printer. 4. Bill of material generation. 5. Netlist generation for PCB layout or for simulation. This module is indicated by the label 1 in Fig. 3.1.
As Eeschema is originally intended for PCB Design, there are no fictitious components1 such as voltage or current sources. Thus, we have added a new library for different types of voltage and current sources such as sine, pulse and square wave. We have also built a library which gives printing and plotting solutions. This extension, developed by us for eSim, is indicated by the label 2 in Fig. 3.1.
CvPcb is a tool that allows the user to associate components in the schematic to component footprints when designing the printed circuit board. CvPcb is the footprint editor tool in KiCad [11]. Typically the netlist file generated by Eeschema does not specify which printed circuit board footprint is associated with each component in the schematic. However, this is not always the case as component footprints can be associated during schematic capture by setting the component’s footprint field. CvPcb provides a convenient method of associating footprints to components. It provides footprint list filtering, footprint viewing, and 3D component model viewing to help ensure that the correct footprint is associated with each component. Components can be assigned to their corresponding footprints manually or automatically by creating equivalence files. Equivalence files are look up tables associating each component with its footprint. This interactive approach is simpler and less error prone than directly associating footprints in the schematic editor. This is because CvPcb not only allows automatic association, but also allows to see the list of available footprints and displays them on the screen to ensure the correct footprint is being associated. This module is indicated by the label 3 in Fig. 3.1.
Pcbnew is a powerful printed circuit board software tool. It is the layout editor tool used in KiCad [11]. It is used in association with the schematic capture software Eeschema, which provides the netlist. Netlist describes the electrical connections of the circuit. CvPcb is used to assign each component, in the netlist produced by Eeschema, to a module that is used by Pcbnew. The features of Pcbnew are given below:
This module is indicated by the label 4 in Fig. 3.1.
We can provide analysis parameters, and the source details through this module. It also allows us to add and edit the device models and subcircuits, included in the circuit schematic. Finally, this module facilitates the conversion of KiCad netlist to Ngspice compatible ones. It is developed by us for eSim and it is indicated by the label 7 in Fig. 3.1.
This tool provides the facility to define a new model for devices such as, 1. Diode 2. Bipolar Junction Transistor (BJT) 3. Metal Oxide Semiconductor Field Effect Transistor (MOSFET) 4. Junction Field Effect Transistor (JFET) 5. IGBT and 6. Magnetic core. This module also helps edit existing models. It is developed by us for eSim and it is indicated by the label 5 in Fig. 3.1.
This module allows the user to create a subcircuit for a component. Once the subcircuit for a component is created, the user can use it in other circuits. It has the facility to define new components such as, Op-amps and IC-555. This component also helps edit existing subcircuits. This module is developed by us for eSim and it is indicated by the label 6 in Fig. 3.1.
Ngspice is a general purpose circuit simulation program for nonlinear dc, nonlinear transient, and linear ac analysis [12]. Circuits may contain resistors, capacitors, inductors, mutual inductors, independent voltage and current sources, four types of dependent sources, lossless and lossy transmission lines (two separate implementations), switches, uniform distributed RC lines, and the five most common semiconductor devices: diodes, BJTs, JFETs, MESFETs, and MOSFET. This module is indicated by the label 9 in Fig. 3.1.
Fig. 3.1 shows the work flow in eSim. The block diagram consists of mainly three parts:
Here we explain the role of each block in designing electronic systems. Circuit design is the first step in the design of an electronic circuit. Generally a circuit diagram is drawn on a paper, and then entered into a computer using a schematic editor. Eeschema is the schematic editor for eSim. Thus all the functionalities of Eeschema are naturally available in eSim.
Libraries for components, explicitly or implicitly supported by Ngspice, have been created using the features of Eeschema. As Eeschema is originally intended for PCB design, there are no fictitious components such as voltage or current sources. Thus, a new library for different types of voltage and current sources such as sine, pulse and square wave, has been added in eSim. A library which gives the functionality of printing and plotting has also been created.
The schematic editor provides a netlist file, which describes the electrical connections of the design. In order to create a PCB layout, physical components are required to be mapped into their footprints. To perform component to footprint mapping, CvPcb is used. Footprints have been created for the components in the newly created libraries. Pcbnew is used to draw a PCB layout.
After designing a circuit, it is essential to check the integrity of the circuit design. In the case of large electronic circuits, breadboard testing is impractical. In such cases, electronic system designers rely heavily on simulation. The accuracy of the simulation results can be increased by accurate modeling of the circuit elements. Model Builder provides the facility to define a new model for devices and edit existing models. Complex circuit elements can be created by hierarchical modeling. Subcircuit Builder provides an easy way to create a subcircuit.
The netlist generated by Schematic Editor cannot be directly used for simulation due to compatibility issues. Netlist Converter converts it into Ngspice compatible format. The type of simulation to be performed and the corresponding options are provided through a graphical user interface (GUI). This is called KiCad to Ngspice Converter in eSim.
eSim uses Ngspice for analog, digital, mixed-level/mixed-signal circuit simulation. Ngspice is based on three open source software packages [14]:
It is a part of gEDA project. Ngspice is capable of simulating devices with BSIM, EKV, HICUM, HiSim, PSP, and PTM models. It is widely used due to its accuracy even for the latest technology devices.
In this chapter we will get started with eSim. We will run through the various options available with an example circuit. Referring to this chapter will make one familiar with eSim and will help plan the project before actually designing a circuit. Lets get started.
After installation is completed, to launch eSim 1. Go to terminal.
2. Type esim and hit enter.
The first window that appears is workspace dialog as shown in Fig. 4.1.
The default workspace is eSim-Workspace under home directory. To create new workspace use browse option.
The main GUI window of eSim is as shown in Fig. 4.2
The eSim main window consists of the following symbols.
The details of tabs under KiCad to Ngspice converter are as follows:
This feature helps the user to perform different types of analysis such as Operating point analysis, DC analysis, AC analysis, transient analysis. It has the facility to
eSim sources are added from eSim_Sources library. Source such as SINE, AC, DC, PULSE are in this library. The parameter values to all the sources added in the shcematic can be given through ’Source Details’.
Ngspice has in built model such as flipflop(D,SR,JK,T),gain,summer etc. which can be utilised while building a circuit. eSim allows to add and modify Ngspice model parameter through Ngspice Model tab.
Devices like Diode, JFET, MOSFET, IGBT, MOS etc used in the circuit can be modeled using device model libraries. eSim also provides editing and adding new model libraries. While converting KiCad to Ngspice, these library files are added to the corresponding devices used in the circuit.
Subcircuits are circuits within circuit. Subcircuiting helps to reuse the parts of the circuits. The subcircuits in the main circuits are added using this facility. Also, eSim provides us with the facility to edit already existing subcircuits.
Project explorer has tree of all the project previously added in it. On right clicking the project we can simply remove or refresh the project in the explorer. Also on double/right clicking, the project file can be opened in the text editor which can then be edited.
This area is used to open the following windows.
Console area provides information about the activity done in current project.
Fig. 5.1 shows the schematic editor and the various menu and toolbars. We will explain them briefly in this section.
The top menu bar will be available at the top left corner. Some of the important menu options in the top menu bar are:
Some of the important tools in the top toolbar are discussed below. They are marked in Fig. 5.3.
The toolbar on the right side of the schematic editor window has many important tools. Some of them are marked in Fig. 5.4.
Let us now look at each of these tools and their uses.
Some of the important tools in the toolbar on the left are discussed below. They are marked in Fig. 5.5.
A set of keyboard keys are associated with various operations in the schematic editor. These keys save time and make it easy to switch from one operation to another. The list of hotkeys can be viewed by going to Preferences in the top menu bar. Choose Hotkeys and select List current keys. The hotkeys can also be edited by selecting the option Edit Hotkeys. Some frequently used hotkeys, along with their functions, are given below:
Note: Both lower and upper-case keys will work as hotkeys.
There are certain differences between the schematic created for simulation and that created for PCB design. We need certain components like plots and current sources. For simulation whereas these are not needed for PCB design. For PCB design, we would require connectors (e.g. DB15 and 2 pin connector) for taking signals in and out of the PCB whereas these have no meaning in simulation. This section covers schematic creation for simulation.
The first step in the creation of circuit schematic is the selection and placement of required components. The components are grouped under eSim-libraries as shown in Fig. 5.6.
We would need a resistor, a capacitor, a voltage source, ground terminal. To place a resistor on the schematic editor window, select the Place a component tool from the toolbar on the right side and click anywhere on the schematic editor. This opens up the component selection window. Resistor component can be found under eSim_Devices library. Fig. 5.7 shows the selection of resistor component. Click on OK. A resistor will be tied to the cursor. Place the resistor on the schematic editor by a single click.
To place the next component, i.e., capacitor, click again on the schematic editor.Similarly, Capacitor component is found under eSim_Devices library. Click on OK. Place the capacitor on the schematic editor by a single click. Let us now place a sinusoidal voltage source. This is required for performing transient analysis. To place it, click again on the schematic editor. On the component selection window, choose the library eSim_source by double clicking on it. Select the component SINE and click on OK. Place the sine source on the schematic editor by a single click.
Place the component by clicking on the schematic editor. Similarly place gnd, a ground terminal and power_flag under power library. Once all the components are placed, the schematic editor would look like the Fig. 5.8.
Let us rotate the resistor to complete the circuit. To rotate the resistor, place the cursor on the resistor and press the key R. Note that if the cursor is placed above the letter R (not R?) on the resistor, it asks to clarify selection. Choose the option Component R. This can be avoided by placing the cursor slightly away from the letter R as shown in Fig. 5.9. This applies to all components.
If one wants to move a component, place the cursor on top of the component and press the key M. The component will be tied to the cursor and can be moved in any direction.
The next step is to wire the connections. Let us connect the resistor to the capacitor. To do so, point the cursor to the terminal of resistor to be connected and press the key W. It has now changed to the wiring mode. Move the cursor towards the terminal of the capacitor and click on it. A wire is formed as shown in Fig. 5.10a.
(a)
Initial
stages 
(b)
Wiring
done 
(c)
Final
schematic
with
PWR_FLAG
Similarly connect the wires between all terminals and the final schematic would look like Fig. 5.10b.
We need to assign values to the components in our circuit i.e., resistor and capacitor. Note that the sine voltage source has been placed for simulation. The specifications of sine source will be given during simulation. To assign value to the resistor, place the cursor above the letter R (not R?) and press the key E. Choose Field value. Type 1k in the Edit value field box as shown in Fig. 5.11. 1k means 1kΩ. Similarly give the value 1u for the capacitor. 1u means 1μF.
The next step is to annotate the schematic. Annotation gives unique references to the components. To annotate the schematic, click on Annotate schematic tool from the top toolbar. Click on annotation, then click on OK and finally click on close as shown in Fig. 5.13. The schematic is now annotated. The question marks next to component references have been replaced by unique numbers. If there are more than one instance of a component (say resistor), the annotation will be done as R1, R2, etc.
Let us now do ERC or Electric Rules Check. To do so, click on Perform electric rules check tool from the top toolbar. Click on Test Erc button. The error as shown in Fig. 5.12 may be displayed. Click on close in the test erc window.
There will be a green arrow pointing to the source of error in the schematic. Here it points to the ground terminal. This is shown in Fig. 5.14.
To correct this error, place a PWR_FLAG from the Eeschema library power. Connect the power flag to the ground terminal as shown in Fig. 5.10c. One needs to place PWR_FLAG wherever the error shown in Fig. 5.12 is obtained. Repeat the ERC. Now there are no errors. With this we have created the schematic for simulation.
To simulate the circuit that has been created in the previous section, we need to generate its netlist. Netlist is a list of components in the schematic along with their connection information. To do so, click on the Generate netlist tool from the top toolbar. Click on spice from the window that opens up. Check the option Default Format. Then click on Generate. This is shown in Fig. 5.15. Save the netlist. This will be a .cir file. Do not change the directory while saving.
Now the netlist is ready to be simulated. Refer to [15] or [16] to know more about Eeschema.
In Chapter 9, we will see the differences between schematic for simulation and schematic for PCB design. Let us design the PCB for a RC circuit. A resistor, capacitor, ground, power flag and a connector are required. Connectors are used to take signals in and out of the PCB.
Create the circuit schematic as shown in Fig. 6.1. The two pin connector (CONN_2) can be placed from the Eeschema library conn. Do the annotation and test for ERC. Refer to Chapter 9 to know more about basic steps in schematic creation.
The netlist for PCB is different from that for simulation. To generate netlist for PCB, click on the Generate netlist tool from the top toolbar in Schematic editor. In the Netlist window, under the tab Pcbnew, click on the button Netlist. This is shown in Fig. 6.2. Click on Save in the Save netlist file dialog box that opens up. Do not change the directory or the name of the netlist file. Save the schematic and close the schematic editor.
Note that the netlist for PCB has an extension .net. The netlist created for simulation has an extension .cir.
Once the netlist for PCB is created, one needs to map each component in the netlist to a footprint. The tool Footprint Editor is used for this. eSim uses CvPcb as its footprint editor. CvPcb is the footprint editor tool in KiCad.
If one opens the Footprint Editor after creating the .net netlist file, the Footprint editor as shown in Fig. 6.3 will be obtained. The menu bar and toolbars and the panes are marked in this figure. The menu bar will be available in the top left corner. The left pane has a list of components in the netlist file and the right pane has a list of available footprints for each component.
Note that if the Footprint Editor is opened before creating a ‘.net’ file, then the left and right panes will be empty.
Some of the important tools in the toolbar are shown in Fig. 6.4. They are explained below:
To view a footprint in 2D, select it from the right pane and click on View selected footprint from the menu bar. Let us view the footprint for SM1210. Choose SM1210 from the right pane as shown in Fig. 6.5. On clicking the View selected footprint tool, the Footprint window with the view in 2D will be displayed. Click on the 3D tool in the Footprint window, as shown in Fig. 6.6. A top view of the selected footprint in 3D is obtained. Click on the footprint and rotate it using mouse to get 3D views from various angles. One such side view of the footprint in 3D is shown in Fig. 6.7.
Click on C1 from the left pane. Choose the footprint C1 from the right pane by double clicking on it. Click on connector P1 from the left pane. Choose the footprint SIL-2 from the right pane by double clicking on it. Similarly choose the footprint R3 for the resistor R1. The footprint mapping is shown in Fig. 6.8. Save the footprint association by clicking on the Save netlist and footprint files tool from the CvPcb toolbar. The Save Net and component List window appears. Browse to the directory where the schematic file for this project is saved and click on Save. The netlist gets saved and the Footprint Editor window closes automatically.
Note that one needs to browse to the directory where the schematic file is saved and save the ‘.net’ file in the same directory.
The next step is to place the footprints and lay tracks between them to get the layout. This is done using the Layout Editor tool. eSim uses Pcbnew, the layout creation tool in KiCad, as its layout editor.
The layout editor with the various menu bar and toolbars is shown in Fig. 6.9.
Some of the important menu options in the top menu bar are shown in Fig. 6.10. They are explained below:
A list of hotkeys are given below:
The list can be viewed by selecting Preferences from the top menu bar and choosing List Current Keys from the option Hotkeys.
Click on Layout Editor from the eSim toolbar. Click on Read Netlist tool from the top toolbar. Click on Browse Netlist files on the Netlist window that opens up. Select the .net file that was modified after assigning footprints. Click on Open. Now Click on Read Current Netlist on the Netlist window. The message area in the Netlist window says that the RC_pcb.net has been read. The sequence of operations is shown in Fig. 6.11.
The footprint modules will now be imported to the top left hand corner of the layout editor window. This is shown in Fig. 6.12.
Zoom in to the top left corner by pressing the key F1 or using the scroll button of the mouse. The zoomed in version of the imported netlist is shown in Fig. 6.13.
Let us now place this in the center of the layout editor window.
Click on Mode footprint: Manual/automatic move and place tool from the top toolbar. Place the cursor near the center of the layout editor window. Right click and choose Glob move and place. Choose move all modules. The sequence of operations is shown in Fig. 6.14. Click on Yes on the confirmation window to move the modules. Zoom in using the F1 key. The current placement of components after zooming in is shown in Fig. 6.15a.
(a)
Zoomed
in
version
of the
current
placement
after
moving
modules
to the
center
of the
layout
editor 
(b)
Final
placement
of
footprints
after
rotating
and
moving
P1
We need to arrange the modules properly to lay tracks. Rotate the connector P1 by placing the cursor on top of P1 and pressing R. Move it by placing the cursor on top of it and pressing M. The final placement is shown in Fig. 6.15b.
Let us now lay the tracks. Let us first change the track width. Click on Design rules from the top menu bar. Click on Design rules. This is shown in Fig. 6.16. The Design Rules Editor window opens up. Here one can edit the various design rules. Double click on the track width field to edit it. Type 0.8 and press Enter. Click on OK. Fig. 6.17 shows the sequence of operations.
Click on Back from the Layer options as shown in Fig. 6.18.
Let us now start laying the tracks. Place the cursor above the left terminal of R1 in the layout editor window. Press the key x. Move the cursor down and double click on the left terminal of C1. A track is formed. This is shown in Fig. 6.19a.
(a) A
track
formed
between
resistor
and
capacitor 
(b) A
track
formed
between
capacitor
and
connector 
(c) A
track
formed
between
connector
and
resistor
Similarly lay the track between capacitor C1 and connector P1 as shown in Fig. 6.19b. The last track needs to be laid at an angle. To do so, place the cursor above the second terminal of R1. Press the key x and move the cursor diagonally down. Double click on the other terminal of the connector. The track will be laid as shown in Fig. 6.19c. All tracks are now laid. The next step is to create PCB edges.
Choose PCB_edges from the Layer options to add edges. Click on Add graphic line or polygon from the toolbar on the left. Fig. 6.20 shows the sequence of operations. Let us now start drawing edges for PCB.
Click to the left of the layout. Move cursor horizontally to the right. Click once to change orientation. Move cursor vertically down. Draw the edges as shown in Fig. 6.21. Double click to finish drawing the edges.
Click on Perform design rules check from the top toolbar to check for design rules. The DRC Control window opens up. Click on Start DRC. There are no errors under the Error messages tab. Click on OK to close DRC control window. Fig. 6.22 shows the sequence of operations.
Click on Save board on the top toolbar.
To generate Gerber files, click on File from the top menu bar. Click on Plot. This is shown in Fig. 6.23. The plot window opens up. One can choose which layers to plot by selecting/deselecting them from the Layers pane on the left side. One can also choose the format used to plot them. Choose Gerber. The output directory of the plots created can also be chosen. By default, it is the project directory. Some more options can be chosen in this window. Click on Plot. The message window shows the location in which the Gerber files are created. Click on Close. This is shown in Fig. 6.24.
The PCB design of RC circuit is now complete. To know more about Pcbnew, refer to [15] or [16].
Spice based simulators include a feature which allows accurate modeling of semiconductor devices such as diodes, transistors etc. eSim Model Editor provides a facility to define a new model for devices such as diodes, MOSFET, BJT, JFET, IGBT, Magnetic core etc. Model Editor in eSim lets the user enter the values of parameters depending on the type of device for which a model is required. The parameter values can be obtained from the data-sheet of the device. A newly created model can be exported to the model library and one can import it for different projects, whenever required. Model Editor also provides a facility to edit existing models. The GUI of the model editor is as shown in Fig. 7.1
eSim lets us create new model libraries based on the template model libraries. On selecting New button the window is popped as shown in Fig. 7.2. The name has to be unique otherwise the error message appears on the window.
After the OK button is pressed the type of model library to be created is chosen by selecting one of the types on the left hand side i.e. Diode, BJT, MOS, JFET, IGBT, Magnetic Core. The template model library opens up in a tabular form as shown in Fig. 7.3
New parameters can be added or current parameters can be removed using ADD and REMOVE buttons. Also the values of parameters can be changed in the table. Adding and removing the parameters in library files is shown in the Fig. 7.4 and Fig. 7.5
After the editing of the model library is done, the file can be saved by selecting the SAVE button. These libraries are saved in the User Libraries folder under deviceModelLibrary repository.
The existing model library can be modified using EDIT option. On clicking the EDIT button the file dialog opens where all the library files are saved as shown in Fig. 7.6. You can select the library you want to edit. Once you are done with the editing, click on SAVE button.
eSim directly cannot use the external .lib file. It has to be uploaded to eSim repository before using it in a circuit. eSim provides the facility to upload library files. They are then converted into xml format, which can be easily modified from the eSim interface. On clicking UPLOAD button the library can be uploaded from any location. The model library will be saved with the name you have provided, in the User Libraries folder of repository deviceModelLibrary.
The steps to create subcircuit are as follows.
The steps to edit a subcircuit are as follows.
Plot the Input and Output Waveform of an RC circuit whose input voltage (Vs) is 50Hz, 3V peak to peak. The values of Resistor (R) and Capacitor(C) are 1k and 1uf respectively.
To create a schematic in KiCad, we need to place the required components. Fig. 9.3 shows the icon on the right toolbar which opens the component library.
After all the required components of the simple RC circuit are placed, wiring is done using the Place Wire option as shown in the Fig. 9.4
Next step is ERC (Electric Rules Check). Fig. 9.5 shows the icon for ERC.
Fig. 9.6 shows the RC circuit after connecting the components by wire.
After clicking the ERC icon a window opens up. Click the Run button to run rules check. The errors are listed in as shown in Fig. 9.7a. This error is handled by adding Power Flag as shown in Fig. 9.7b.
After adding the Power Flag the completed RC circuit is shown in Fig. 9.8a and the netlist is generated as shown in Fig. 9.8b.
(a)
Schematic
of RC
circuit 
(b)
Generating
KiCad
Netlist
of RC
circuit
Now you can enter the type of analysis and source details as shown in Fig. 9.10a and Fig. 9.10b respectively.
The other tab will be empty as RC circuit do not use any Ngspice model, device library and subcircuit.
After entering the value, press the convert button. It will convert the netlist into Ngspice compatible netlist.
In eSim, there are two types of plot. First is normal Ngspice plot and second is interactive python plot as shown in Fig. 9.12a and Fig. 9.12b respectively.
In the interactive python plot you can select any node or branch to plot voltage or current across it. Also it has the facility to plot basic functions across the node like addition, substraction, multiplication, division and v/s.
Plot the Input and Output Waveform of Half Wave Rectifier circuit where the input voltage (Vs) is 50Hz, 2V peak to peak. The value for Resistor (R) is 1k.
The new project is created by clicking the New icon on the menubar. The name of the project is given in the window shown in Fig. 9.1.
After the KiCad window is opened, to create a schematic we need to place the
required components. Fig. 9.3 shows the icon on the right toolbar which opens
the component library.
After all the required components of the simple Half Wave rectifier circuits are
placed, wiring is done using the Place Wire option as shown in the Fig. 9.4
Next step is ERC (Electric Rules Check). Fig. 9.5 shows the icon for ERC. After
completing all the above steps the final Half Wave Rectifier schematic will look
like Fig. 9.13.
KiCad netlist is generated as shown in the Fig. 9.14
(a)
Half
Wave
Rectifier
Analysis 
(b)
Half
Wave
Rectifier
Source
Details 
(c)
Half
Wave
Rectifier
Device
Modeling
Under device library you can add the library for diode used in the circuit. If you do not add any library it will take default Ngspice model.
(a)
Ngspice
Plot
of
Half
Wave
Rectifier 
(b)
Python
Plot
of
Half
Wave
Rectifier
Plot the input and output waveform of the Precision Rectifier circuit where input voltage (Vs) is 50Hz , 3V peak to peak.
The new project is created by clicking the New icon on the menubar. The name of the project is given as shown in the Fig. 9.1.
The KiCad netlist is generated as shown in Fig. 9.18.
This will open converter window where you can enter details of Analysis, Source values, Device library and Subcircuit.
(a)
Precision
Rectifier
Analysis 
(b)
Precision
Rectifier
Source
Details
(c)
Precision
Rectifier
Device
Modeling 
(d)
Precision
Rectifier
Subcircuit
Under device library you can add the library for the diode used in the circuit. If you do
not add any library it will take default Ngspice model for diode.
Under subcircuit tab you have to add the subciruit used in your circuit. If you forget to add subcircuit it will throw an error.
(a)
Ngspice
Plot
of
Precision
Rectifier 
(b)
Python
Plot
of
Precision
Rectifier
Plot the Input and Output Waveform of Inverting Amplifier circuit where the input voltage (Vs) is 50Hz, 2V peak to peak and gain is 2.
The Fig. 9.21 shows the complete Precision Rectifier schematic after removing the errors.
The KiCad netlist is generated as shown in Fig. 9.22.
This will open converter window where you can enter details of Analysis, Source values, Device library and Subcircuit.
Subcircuit of Op-Amp is shown in Fig. 9.23d
(a)
Inverting
Amplifier
Analysis 
(b)
Inverting
Amplifier
Source
Details
(c)
Inverting
Amplifier
Subcircuit 
(d)
Sub-Circuit
of
Op-Amp
Under subcircuit tab you have to add the subciruit used in your circuit. If you forget to
add subcircuit, it will throw an error.
(a)
Inverting
Amplifier
Ngspice
Plot
(b)
Inverting
Amplifier
Python
Plot
Plot the Input and Output Waveform of Half Adder circuit.
The Fig. 9.25 shows the complete Half Adder schematic after removing the errors.
The KiCad netlist is generated as shown in Fig. 9.26.
This will open converter window where you can enter details of Analysis, Source values, Ngspice model and Subcircuit.
(a)
Half
Adder
Analysis 
(b)
Half
Adder
Source
Details
(c)
Half
Adder
Ngspice
Model 
(d)
Half
Adder
Subcircuit
Model
Subcircuit of Half Adder in Fig. 9.28
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[14] S. M. Sandler and C. Hymowitz, SPICE Circuit Handbook. New York: McGraw-Hill Professional, 2006.
[15] J.-P. Charras and F. Tappero. (2013, May). [Online]. Available: http://www.kicad-pcb.org/display/KICAD/KiCad+Documentation
[16] D. Jahshan and P. Hutchinson. (2013, May). [Online]. Available: http://bazaar.launchpad.net/∼kicad-developers/kicad/doc/files/head:/doc/tutorials/
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