* Subcircuit ls373
.subckt ls373 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ net-_u1-pad17_ net-_u1-pad18_ 
* c:\users\shanthipriya\desktop\madeeasy\fossee\esim\library\subcircuitlibrary\ls373\ls373.cir
.include 4d_375.sub
x1 net-_u1-pad3_ net-_u2-pad2_ ? net-_u3-pad2_ 4d_375
x2 net-_u1-pad4_ net-_u2-pad2_ ? net-_u4-pad2_ 4d_375
x3 net-_u1-pad5_ net-_u2-pad2_ ? net-_u5-pad2_ 4d_375
x4 net-_u1-pad6_ net-_u2-pad2_ ? net-_u6-pad2_ 4d_375
x5 net-_u1-pad7_ net-_u2-pad2_ ? net-_u7-pad2_ 4d_375
x6 net-_u1-pad8_ net-_u2-pad2_ ? net-_u8-pad2_ 4d_375
x7 net-_u1-pad9_ net-_u2-pad2_ ? net-_u9-pad2_ 4d_375
x8 net-_u1-pad10_ net-_u2-pad2_ ? net-_u10-pad2_ 4d_375
* u2  net-_u1-pad1_ net-_u2-pad2_ d_inverter
* u3  net-_u1-pad2_ net-_u3-pad2_ net-_u1-pad11_ d_and
* u4  net-_u1-pad2_ net-_u4-pad2_ net-_u1-pad12_ d_and
* u5  net-_u1-pad2_ net-_u5-pad2_ net-_u1-pad13_ d_and
* u6  net-_u1-pad2_ net-_u6-pad2_ net-_u1-pad14_ d_and
* u7  net-_u1-pad2_ net-_u7-pad2_ net-_u1-pad15_ d_and
* u8  net-_u1-pad2_ net-_u8-pad2_ net-_u1-pad16_ d_and
* u9  net-_u1-pad2_ net-_u9-pad2_ net-_u1-pad17_ d_and
* u10  net-_u1-pad2_ net-_u10-pad2_ net-_u1-pad18_ d_and
a1 net-_u1-pad1_ net-_u2-pad2_ u2
a2 [net-_u1-pad2_ net-_u3-pad2_ ] net-_u1-pad11_ u3
a3 [net-_u1-pad2_ net-_u4-pad2_ ] net-_u1-pad12_ u4
a4 [net-_u1-pad2_ net-_u5-pad2_ ] net-_u1-pad13_ u5
a5 [net-_u1-pad2_ net-_u6-pad2_ ] net-_u1-pad14_ u6
a6 [net-_u1-pad2_ net-_u7-pad2_ ] net-_u1-pad15_ u7
a7 [net-_u1-pad2_ net-_u8-pad2_ ] net-_u1-pad16_ u8
a8 [net-_u1-pad2_ net-_u9-pad2_ ] net-_u1-pad17_ u9
a9 [net-_u1-pad2_ net-_u10-pad2_ ] net-_u1-pad18_ u10
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_and, NgSpice Name: d_and
.model u3 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_and, NgSpice Name: d_and
.model u4 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_and, NgSpice Name: d_and
.model u5 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_and, NgSpice Name: d_and
.model u6 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_and, NgSpice Name: d_and
.model u7 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_and, NgSpice Name: d_and
.model u8 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_and, NgSpice Name: d_and
.model u9 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_and, NgSpice Name: d_and
.model u10 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Control Statements

.ends ls373