* Subcircuit CD4078B_IC .subckt CD4078B_IC net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ * d:\fossee\esim\library\subcircuitlibrary\cd4078b_ic\cd4078b_ic.cir * u3 net-_u2-pad9_ net-_u11-pad1_ d_inverter * u4 net-_u2-pad10_ net-_u11-pad2_ d_inverter * u5 net-_u2-pad11_ net-_u12-pad1_ d_inverter * u6 net-_u2-pad12_ net-_u12-pad2_ d_inverter * u7 net-_u2-pad13_ net-_u13-pad1_ d_inverter * u8 net-_u2-pad14_ net-_u13-pad2_ d_inverter * u9 net-_u2-pad15_ net-_u14-pad1_ d_inverter * u10 net-_u10-pad1_ net-_u10-pad2_ d_inverter * u21 net-_u19-pad3_ net-_u20-pad3_ net-_u21-pad3_ d_nor * u22 net-_u21-pad3_ net-_u22-pad2_ d_inverter * u24 net-_u22-pad2_ net-_u24-pad2_ d_inverter * u23 net-_u21-pad3_ net-_u23-pad2_ d_inverter * u25 net-_u24-pad2_ net-_u23-pad2_ net-_u1-pad10_ net-_u1-pad9_ dac_bridge_2 * u2 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u2-pad9_ net-_u2-pad10_ net-_u2-pad11_ net-_u2-pad12_ net-_u2-pad13_ net-_u2-pad14_ net-_u2-pad15_ net-_u10-pad1_ adc_bridge_8 * u11 net-_u11-pad1_ net-_u11-pad2_ net-_u11-pad3_ d_nand * u12 net-_u12-pad1_ net-_u12-pad2_ net-_u12-pad3_ d_nand * u15 net-_u11-pad3_ net-_u11-pad3_ net-_u15-pad3_ d_nand * u16 net-_u12-pad3_ net-_u12-pad3_ net-_u16-pad3_ d_nand * u19 net-_u15-pad3_ net-_u16-pad3_ net-_u19-pad3_ d_nand * u13 net-_u13-pad1_ net-_u13-pad2_ net-_u13-pad3_ d_nand * u14 net-_u14-pad1_ net-_u10-pad2_ net-_u14-pad3_ d_nand * u17 net-_u13-pad3_ net-_u13-pad3_ net-_u17-pad3_ d_nand * u18 net-_u14-pad3_ net-_u14-pad3_ net-_u18-pad3_ d_nand * u20 net-_u17-pad3_ net-_u18-pad3_ net-_u20-pad3_ d_nand a1 net-_u2-pad9_ net-_u11-pad1_ u3 a2 net-_u2-pad10_ net-_u11-pad2_ u4 a3 net-_u2-pad11_ net-_u12-pad1_ u5 a4 net-_u2-pad12_ net-_u12-pad2_ u6 a5 net-_u2-pad13_ net-_u13-pad1_ u7 a6 net-_u2-pad14_ net-_u13-pad2_ u8 a7 net-_u2-pad15_ net-_u14-pad1_ u9 a8 net-_u10-pad1_ net-_u10-pad2_ u10 a9 [net-_u19-pad3_ net-_u20-pad3_ ] net-_u21-pad3_ u21 a10 net-_u21-pad3_ net-_u22-pad2_ u22 a11 net-_u22-pad2_ net-_u24-pad2_ u24 a12 net-_u21-pad3_ net-_u23-pad2_ u23 a13 [net-_u24-pad2_ net-_u23-pad2_ ] [net-_u1-pad10_ net-_u1-pad9_ ] u25 a14 [net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ ] [net-_u2-pad9_ net-_u2-pad10_ net-_u2-pad11_ net-_u2-pad12_ net-_u2-pad13_ net-_u2-pad14_ net-_u2-pad15_ net-_u10-pad1_ ] u2 a15 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u11-pad3_ u11 a16 [net-_u12-pad1_ net-_u12-pad2_ ] net-_u12-pad3_ u12 a17 [net-_u11-pad3_ net-_u11-pad3_ ] net-_u15-pad3_ u15 a18 [net-_u12-pad3_ net-_u12-pad3_ ] net-_u16-pad3_ u16 a19 [net-_u15-pad3_ net-_u16-pad3_ ] net-_u19-pad3_ u19 a20 [net-_u13-pad1_ net-_u13-pad2_ ] net-_u13-pad3_ u13 a21 [net-_u14-pad1_ net-_u10-pad2_ ] net-_u14-pad3_ u14 a22 [net-_u13-pad3_ net-_u13-pad3_ ] net-_u17-pad3_ u17 a23 [net-_u14-pad3_ net-_u14-pad3_ ] net-_u18-pad3_ u18 a24 [net-_u17-pad3_ net-_u18-pad3_ ] net-_u20-pad3_ u20 * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u10 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_nor, NgSpice Name: d_nor .model u21 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u22 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u24 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u23 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: dac_bridge_2, NgSpice Name: dac_bridge .model u25 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) * Schematic Name: adc_bridge_8, NgSpice Name: adc_bridge .model u2 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) * Schematic Name: d_nand, NgSpice Name: d_nand .model u11 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_nand, NgSpice Name: d_nand .model u12 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_nand, NgSpice Name: d_nand .model u15 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_nand, NgSpice Name: d_nand .model u16 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_nand, NgSpice Name: d_nand .model u19 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_nand, NgSpice Name: d_nand .model u13 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_nand, NgSpice Name: d_nand .model u14 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_nand, NgSpice Name: d_nand .model u17 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_nand, NgSpice Name: d_nand .model u18 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Schematic Name: d_nand, NgSpice Name: d_nand .model u20 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) * Control Statements .ends CD4078B_IC