* Subcircuit 8286
.subckt 8286 /oe_bar /trans/rxr_bar /a0 /b0 /a1 /b1 /a2 /b2 /a3 /b3 /a4 /b4 /a5 /b5 /a6 /b6 /a7 /b7 ? ? 
* c:\users\hp\onedrive\documents\fossee\esim\library\subcircuitlibrary\8286\8286.cir
* u3  /oe_bar /trans/rxr_bar net-_u11-pad2_ d_nor
* u2  /trans/rxr_bar net-_u2-pad2_ d_inverter
* u6  /a0 net-_u10-pad2_ /b0 d_tristate
* u8  /a1 net-_u10-pad2_ /b1 d_tristate
* u10  /a2 net-_u10-pad2_ /b2 d_tristate
* u16  /a4 net-_u10-pad2_ /b4 d_tristate
* u18  /a5 net-_u10-pad2_ /b5 d_tristate
* u20  /a6 net-_u10-pad2_ /b6 d_tristate
* u22  /a7 net-_u10-pad2_ /b7 d_tristate
* u5  /b0 net-_u11-pad2_ /a0 d_tristate
* u7  /b1 net-_u11-pad2_ /a1 d_tristate
* u9  /b2 net-_u11-pad2_ /a2 d_tristate
* u15  /b4 net-_u11-pad2_ /a4 d_tristate
* u17  /b5 net-_u11-pad2_ /a5 d_tristate
* u19  /b6 net-_u11-pad2_ /a6 d_tristate
* u21  /b7 net-_u11-pad2_ /a7 d_tristate
* u11  /b3 net-_u11-pad2_ /a3 d_tristate
* u12  /a3 net-_u10-pad2_ /b3 d_tristate
* u4  net-_u2-pad2_ /oe_bar net-_u10-pad2_ d_nor
a1 [/oe_bar /trans/rxr_bar ] net-_u11-pad2_ u3
a2 /trans/rxr_bar net-_u2-pad2_ u2
a3 /a0 net-_u10-pad2_ /b0 u6
a4 /a1 net-_u10-pad2_ /b1 u8
a5 /a2 net-_u10-pad2_ /b2 u10
a6 /a4 net-_u10-pad2_ /b4 u16
a7 /a5 net-_u10-pad2_ /b5 u18
a8 /a6 net-_u10-pad2_ /b6 u20
a9 /a7 net-_u10-pad2_ /b7 u22
a10 /b0 net-_u11-pad2_ /a0 u5
a11 /b1 net-_u11-pad2_ /a1 u7
a12 /b2 net-_u11-pad2_ /a2 u9
a13 /b4 net-_u11-pad2_ /a4 u15
a14 /b5 net-_u11-pad2_ /a5 u17
a15 /b6 net-_u11-pad2_ /a6 u19
a16 /b7 net-_u11-pad2_ /a7 u21
a17 /b3 net-_u11-pad2_ /a3 u11
a18 /a3 net-_u10-pad2_ /b3 u12
a19 [net-_u2-pad2_ /oe_bar ] net-_u10-pad2_ u4
* Schematic Name:                             d_nor, NgSpice Name: d_nor
.model u3 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u6 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u8 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u10 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u16 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u18 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u20 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u22 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u5 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u7 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u9 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u15 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u17 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u19 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u21 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u11 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_tristate, NgSpice Name: d_tristate
.model u12 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
* Schematic Name:                             d_nor, NgSpice Name: d_nor
.model u4 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Control Statements

.ends 8286