* Subcircuit 74HC20
.subckt 74HC20 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ 
* c:\fossee\esim\library\subcircuitlibrary\74hc20\74hc20.cir
* u2  net-_u1-pad1_ net-_u10-pad1_ d_inverter
* u3  net-_u1-pad2_ net-_u10-pad2_ d_inverter
* u10  net-_u10-pad1_ net-_u10-pad2_ net-_u10-pad3_ d_nor
* u4  net-_u1-pad3_ net-_u11-pad1_ d_inverter
* u5  net-_u1-pad4_ net-_u11-pad2_ d_inverter
* u11  net-_u11-pad1_ net-_u11-pad2_ net-_u11-pad3_ d_nor
* u14  net-_u10-pad3_ net-_u11-pad3_ net-_u14-pad3_ d_nand
* u16  net-_u14-pad3_ net-_u16-pad2_ d_inverter
* u18  net-_u16-pad2_ net-_u1-pad5_ d_inverter
* u6  net-_u1-pad6_ net-_u12-pad1_ d_inverter
* u7  net-_u1-pad7_ net-_u12-pad2_ d_inverter
* u12  net-_u12-pad1_ net-_u12-pad2_ net-_u12-pad3_ d_nor
* u8  net-_u1-pad8_ net-_u13-pad1_ d_inverter
* u9  net-_u1-pad9_ net-_u13-pad2_ d_inverter
* u13  net-_u13-pad1_ net-_u13-pad2_ net-_u13-pad3_ d_nor
* u15  net-_u12-pad3_ net-_u13-pad3_ net-_u15-pad3_ d_nand
* u17  net-_u15-pad3_ net-_u17-pad2_ d_inverter
* u19  net-_u17-pad2_ net-_u1-pad10_ d_inverter
a1 net-_u1-pad1_ net-_u10-pad1_ u2
a2 net-_u1-pad2_ net-_u10-pad2_ u3
a3 [net-_u10-pad1_ net-_u10-pad2_ ] net-_u10-pad3_ u10
a4 net-_u1-pad3_ net-_u11-pad1_ u4
a5 net-_u1-pad4_ net-_u11-pad2_ u5
a6 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u11-pad3_ u11
a7 [net-_u10-pad3_ net-_u11-pad3_ ] net-_u14-pad3_ u14
a8 net-_u14-pad3_ net-_u16-pad2_ u16
a9 net-_u16-pad2_ net-_u1-pad5_ u18
a10 net-_u1-pad6_ net-_u12-pad1_ u6
a11 net-_u1-pad7_ net-_u12-pad2_ u7
a12 [net-_u12-pad1_ net-_u12-pad2_ ] net-_u12-pad3_ u12
a13 net-_u1-pad8_ net-_u13-pad1_ u8
a14 net-_u1-pad9_ net-_u13-pad2_ u9
a15 [net-_u13-pad1_ net-_u13-pad2_ ] net-_u13-pad3_ u13
a16 [net-_u12-pad3_ net-_u13-pad3_ ] net-_u15-pad3_ u15
a17 net-_u15-pad3_ net-_u17-pad2_ u17
a18 net-_u17-pad2_ net-_u1-pad10_ u19
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_nor, NgSpice Name: d_nor
.model u10 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_nor, NgSpice Name: d_nor
.model u11 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_nand, NgSpice Name: d_nand
.model u14 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u16 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u18 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_nor, NgSpice Name: d_nor
.model u12 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_nor, NgSpice Name: d_nor
.model u13 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_nand, NgSpice Name: d_nand
.model u15 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u17 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
.model u19 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Control Statements

.ends 74HC20