* c:\fossee_mains\fossee\esim\library\subcircuitlibrary\74f350\74f350.cir .include 3_and.sub x16 net-_u24-pad2_ net-_u22-pad2_ net-_u1-pad7_ net-_u16-pad1_ 3_and x15 net-_u25-pad2_ net-_u22-pad2_ net-_u1-pad6_ net-_u16-pad2_ 3_and x14 net-_u24-pad2_ net-_u23-pad2_ net-_u1-pad5_ net-_u13-pad1_ 3_and x13 net-_u25-pad2_ net-_u23-pad2_ net-_u1-pad4_ net-_u13-pad2_ 3_and x12 net-_u24-pad2_ net-_u22-pad2_ net-_u1-pad6_ net-_u12-pad1_ 3_and x11 net-_u25-pad2_ net-_u22-pad2_ net-_u1-pad5_ net-_u12-pad2_ 3_and x10 net-_u24-pad2_ net-_u23-pad2_ net-_u1-pad4_ net-_u9-pad1_ 3_and x9 net-_u25-pad2_ net-_u23-pad2_ net-_u1-pad3_ net-_u9-pad2_ 3_and x8 net-_u24-pad2_ net-_u22-pad2_ net-_u1-pad5_ net-_u8-pad1_ 3_and x7 net-_u25-pad2_ net-_u22-pad2_ net-_u1-pad4_ net-_u8-pad2_ 3_and x6 net-_u24-pad2_ net-_u23-pad2_ net-_u1-pad3_ net-_u6-pad1_ 3_and x5 net-_u25-pad2_ net-_u23-pad2_ net-_u1-pad2_ net-_u6-pad2_ 3_and x4 net-_u24-pad2_ net-_u22-pad2_ net-_u1-pad4_ net-_u4-pad1_ 3_and x3 net-_u25-pad2_ net-_u22-pad2_ net-_u1-pad3_ net-_u4-pad2_ 3_and x2 net-_u24-pad2_ net-_u23-pad2_ net-_u1-pad2_ net-_u2-pad1_ 3_and x1 net-_u25-pad2_ net-_u23-pad2_ net-_u1-pad1_ net-_u2-pad2_ 3_and * u26 net-_u1-pad13_ net-_u10-pad1_ d_inverter * u24 net-_u1-pad10_ net-_u24-pad2_ d_inverter * u22 net-_u1-pad9_ net-_u22-pad2_ d_inverter * u25 net-_u24-pad2_ net-_u25-pad2_ d_inverter * u23 net-_u22-pad2_ net-_u23-pad2_ d_inverter * u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ ? net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ ? port * u20 net-_u10-pad1_ net-_u14-pad3_ net-_u1-pad15_ d_and * u15 net-_u10-pad1_ net-_u11-pad3_ net-_u1-pad14_ d_and * u10 net-_u10-pad1_ net-_u10-pad2_ net-_u1-pad12_ d_and * u5 net-_u10-pad1_ net-_u3-pad3_ net-_u1-pad11_ d_and * u14 net-_u14-pad1_ net-_u13-pad3_ net-_u14-pad3_ d_or * u11 net-_u11-pad1_ net-_u11-pad2_ net-_u11-pad3_ d_or * u7 net-_u7-pad1_ net-_u6-pad3_ net-_u10-pad2_ d_or * u3 net-_u3-pad1_ net-_u2-pad3_ net-_u3-pad3_ d_or * u16 net-_u16-pad1_ net-_u16-pad2_ net-_u14-pad1_ d_or * u13 net-_u13-pad1_ net-_u13-pad2_ net-_u13-pad3_ d_or * u12 net-_u12-pad1_ net-_u12-pad2_ net-_u11-pad1_ d_or * u9 net-_u9-pad1_ net-_u9-pad2_ net-_u11-pad2_ d_or * u8 net-_u8-pad1_ net-_u8-pad2_ net-_u7-pad1_ d_or * u6 net-_u6-pad1_ net-_u6-pad2_ net-_u6-pad3_ d_or * u4 net-_u4-pad1_ net-_u4-pad2_ net-_u3-pad1_ d_or * u2 net-_u2-pad1_ net-_u2-pad2_ net-_u2-pad3_ d_or a1 net-_u1-pad13_ net-_u10-pad1_ u26 a2 net-_u1-pad10_ net-_u24-pad2_ u24 a3 net-_u1-pad9_ net-_u22-pad2_ u22 a4 net-_u24-pad2_ net-_u25-pad2_ u25 a5 net-_u22-pad2_ net-_u23-pad2_ u23 a6 [net-_u10-pad1_ net-_u14-pad3_ ] net-_u1-pad15_ u20 a7 [net-_u10-pad1_ net-_u11-pad3_ ] net-_u1-pad14_ u15 a8 [net-_u10-pad1_ net-_u10-pad2_ ] net-_u1-pad12_ u10 a9 [net-_u10-pad1_ net-_u3-pad3_ ] net-_u1-pad11_ u5 a10 [net-_u14-pad1_ net-_u13-pad3_ ] net-_u14-pad3_ u14 a11 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u11-pad3_ u11 a12 [net-_u7-pad1_ net-_u6-pad3_ ] net-_u10-pad2_ u7 a13 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u3-pad3_ u3 a14 [net-_u16-pad1_ net-_u16-pad2_ ] net-_u14-pad1_ u16 a15 [net-_u13-pad1_ net-_u13-pad2_ ] net-_u13-pad3_ u13 a16 [net-_u12-pad1_ net-_u12-pad2_ ] net-_u11-pad1_ u12 a17 [net-_u9-pad1_ net-_u9-pad2_ ] net-_u11-pad2_ u9 a18 [net-_u8-pad1_ net-_u8-pad2_ ] net-_u7-pad1_ u8 a19 [net-_u6-pad1_ net-_u6-pad2_ ] net-_u6-pad3_ u6 a20 [net-_u4-pad1_ net-_u4-pad2_ ] net-_u3-pad1_ u4 a21 [net-_u2-pad1_ net-_u2-pad2_ ] net-_u2-pad3_ u2 * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u26 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u24 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u22 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u25 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_inverter, NgSpice Name: d_inverter .model u23 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_and, NgSpice Name: d_and .model u20 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_and, NgSpice Name: d_and .model u15 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_and, NgSpice Name: d_and .model u10 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_and, NgSpice Name: d_and .model u5 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_or, NgSpice Name: d_or .model u14 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_or, NgSpice Name: d_or .model u11 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_or, NgSpice Name: d_or .model u7 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_or, NgSpice Name: d_or .model u3 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_or, NgSpice Name: d_or .model u16 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_or, NgSpice Name: d_or .model u13 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_or, NgSpice Name: d_or .model u12 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_or, NgSpice Name: d_or .model u9 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_or, NgSpice Name: d_or .model u8 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_or, NgSpice Name: d_or .model u6 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_or, NgSpice Name: d_or .model u4 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) * Schematic Name: d_or, NgSpice Name: d_or .model u2 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) .tran 0e-00 0e-00 0e-00 * Control Statements .control run print allv > plot_data_v.txt print alli > plot_data_i.txt .endc .end